Journal ArticleDOI
An improved frequency compensation technique for CMOS operational amplifiers
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TLDR
In this paper, a two-stage CMOS operational amplifier is proposed to provide stable operation for a much larger range of capacitive loads, as well as much improved V/SUB BB/ power supply rejection over very wide bandwidths for the same basic operational amplifier circuit.Abstract:
The commonly used two-stage CMOS operational amplifier suffers from two basic performance limitations due to the RC compensation network around the second gain stage. First, it provides stable operation for only a limited range of capacitive loads, and second, the power supply rejection shows severe degradation above the open-loop pole frequency. The technique described provides stable operation for a much larger range of capacitive loads, as well as much improved V/SUB BB/ power supply rejection over very wide bandwidths for the same basic operational amplifier circuit. The author presents a mathematical analysis of this new technique in terms of its frequency and noise characteristics followed by its implementation in all n-well CMOS process. Experimental results show 70-dB negative power supply rejection at 100 kHz and an input noise density of 58 nV/(Hz)/SUP 1/2/ at 1 kHz.read more
Citations
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Proceedings ArticleDOI
Design techniques for CMOS micropower low-voltage switched-capacitor delta-sigma modulator
TL;DR: In this paper, the design of a micropower, lowvoltage switched-capacitor delta-sigma modulator that consumes only 90 /spl mu/W at 1.5V supply is described.
Journal ArticleDOI
A Supply-Noise-Insensitive PLL in Monolithic Active Pixel Sensors
TL;DR: In this article, a high-performance CMOS charge pump supply-noise-insensitive phase-locked loop (SNI-PLL) was presented for on-chip clock generation of Monolithic Active Pixel Sensors (MAPS).
Proceedings ArticleDOI
A low-voltage high-gain wide-bandwidth class-AB differential difference amplifier
Fuding Ge,B. Thomas +1 more
TL;DR: A CMOS low-voltage high gain and wide bandwidth differential difference amplifier (DDA) based on a robust two-stage class-AB amplifier with cascode Miller compensation that achieves a DC open loop gain of 80 dB and unity-gain bandwidth of 20 MHz.
Book ChapterDOI
Components and Definitions
TL;DR: In this article, the essential transformations of signals, decomposition in harmonic components, and statistical methods are summarized and some examples are given that are applicable to problems in the following chapters.
References
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Journal ArticleDOI
MOS operational amplifier design-a tutorial overview
Paul R. Gray,Robert G. Meyer +1 more
TL;DR: In this paper, an overview of current design techniques for operational amplifiers implemented in CMOS and NMOS technology at a tutorial level is presented, focusing on CMOS amplifiers because of their more widespread use.
Journal ArticleDOI
A high performance low power CMOS channel filter
TL;DR: In this article, a new CMOS PCM channel filter is described, which includes transmit and receive filters on a single die, and the chip displays an idle-channel noise of typically 0 dBrnC0, a power supply rejection ratio of 40-50 dB at 1 kHz, and a fully operational power dissipation of only 35 mW.
Journal ArticleDOI
High-performance NMOS operational amplifier
TL;DR: A high performance operational amplifier 300 mil/SUP 2/ in area has been designed and fabricated in a standard n-channel silicon-gate enhancement/depletion MOS process.
Journal ArticleDOI
A single-chip CMOS PCM codec with filters
TL;DR: In this paper, a complete PCM codec using charge redistribution and switched-capacitor techniques is described, implemented in a two-level polysilicon CMOS technology using 23.4 mm/SUP 2/ of active area.
Journal ArticleDOI
Low-Power High-Drive CMOS Operational Amplifiers
TL;DR: Low-power CMOS op amps with high-drive capability and good settling characteristics are described, suitable for applications in such systems as charge-redistribution codecs and switched-capacitor filters.