Journal ArticleDOI
An improved frequency compensation technique for CMOS operational amplifiers
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TLDR
In this paper, a two-stage CMOS operational amplifier is proposed to provide stable operation for a much larger range of capacitive loads, as well as much improved V/SUB BB/ power supply rejection over very wide bandwidths for the same basic operational amplifier circuit.Abstract:
The commonly used two-stage CMOS operational amplifier suffers from two basic performance limitations due to the RC compensation network around the second gain stage. First, it provides stable operation for only a limited range of capacitive loads, and second, the power supply rejection shows severe degradation above the open-loop pole frequency. The technique described provides stable operation for a much larger range of capacitive loads, as well as much improved V/SUB BB/ power supply rejection over very wide bandwidths for the same basic operational amplifier circuit. The author presents a mathematical analysis of this new technique in terms of its frequency and noise characteristics followed by its implementation in all n-well CMOS process. Experimental results show 70-dB negative power supply rejection at 100 kHz and an input noise density of 58 nV/(Hz)/SUP 1/2/ at 1 kHz.read more
Citations
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Journal ArticleDOI
Design of High-Performance Analog Circuits Using Wideband g m -Enhanced MOS Composite Transistors
Yang Tian,Pak Kwong Chan +1 more
TL;DR: Comparing its results with other state-of-art LDO reported results, it validates the significant enhanced performance of the proposed composite-transistor-based design in terms of speed, current driving capability and stability against changes in environmental parameters.
Proceedings ArticleDOI
A low offset instrumentation amplifier for biomedical applications
TL;DR: A low power, superior input referred offset Instrumentation amplifier suitable for biomedical applications has been described, which uses an intermediate buffering transistor between the opamp and common mode to improve the offset.
Proceedings ArticleDOI
Design and optimization of low-voltage two-stage CMOS amplifiers with enhanced performance
TL;DR: A novel method for designing and optimizing high-speed low-voltage two-stage amplifiers with enhanced performance by adding an additional degree-of-freedom to the topology that allows reaching, simultaneously, high DC gain and fast settling response without increasing the power dissipation.
Proceedings ArticleDOI
A new two-stage Op-Amp using gate-driven, and positive feedback techniques
TL;DR: It is shown that the proposed Op-Amp has better settling behavior than its conventional counterpart and will increase the DC-gain but no significant change will be made in the unity-gain bandwidth of the circuit.
Proceedings ArticleDOI
Reversed nested Miller compensation with current follower
TL;DR: The reversed nested-Miller compensation technique is reviewed by using a simple design-oriented approach and SPICE simulations, using the parameters of a 0.8/spl mu/m CMOS process, are in excellent agreement with theoretical derivations.
References
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Journal ArticleDOI
MOS operational amplifier design-a tutorial overview
Paul R. Gray,Robert G. Meyer +1 more
TL;DR: In this paper, an overview of current design techniques for operational amplifiers implemented in CMOS and NMOS technology at a tutorial level is presented, focusing on CMOS amplifiers because of their more widespread use.
Journal ArticleDOI
A high performance low power CMOS channel filter
TL;DR: In this article, a new CMOS PCM channel filter is described, which includes transmit and receive filters on a single die, and the chip displays an idle-channel noise of typically 0 dBrnC0, a power supply rejection ratio of 40-50 dB at 1 kHz, and a fully operational power dissipation of only 35 mW.
Journal ArticleDOI
High-performance NMOS operational amplifier
TL;DR: A high performance operational amplifier 300 mil/SUP 2/ in area has been designed and fabricated in a standard n-channel silicon-gate enhancement/depletion MOS process.
Journal ArticleDOI
A single-chip CMOS PCM codec with filters
TL;DR: In this paper, a complete PCM codec using charge redistribution and switched-capacitor techniques is described, implemented in a two-level polysilicon CMOS technology using 23.4 mm/SUP 2/ of active area.
Journal ArticleDOI
Low-Power High-Drive CMOS Operational Amplifiers
TL;DR: Low-power CMOS op amps with high-drive capability and good settling characteristics are described, suitable for applications in such systems as charge-redistribution codecs and switched-capacitor filters.