Proceedings ArticleDOI
Area and Current Efficient Capacitor-Less Low Drop-Out Regulator Using Time-Based Error Amplifier
Qadeer A. Khan,Saurabh Saxena,Abirmoya Santra +2 more
- pp 1-5
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TLDR
An output capacitor-less low drop-out (LDO) regulator using time-based error amplifier using voltage-controlled oscillator (VCO) as an integrator to replace the conventional voltage- based error amplifier is presented in this paper.Abstract:
An output capacitor-less low drop-out (LDO) regulator using time-based error amplifier is presented in this paper. The proposed LDO utilizes voltage-controlled oscillator (VCO) as an integrator to replace the conventional voltage-based error amplifier. It reduces the overall area by using only 1.2pF of on-chip capacitor while consuming low quiescent current (<30μA at typical corner). Using time as the processing variable, the time-based error amplifier operates with full-swing CMOS digital like signals without introducing any quantization error. The proposed LDO was designed in TSMC 65nm CMOS LP technology with input and output voltages as 1.2 V and 0.8V-1.1V, respectively, achieving a regulation bandwidth of 3MHz. Settling time of 200ns or less was achieved for 10mA load current step and 0–100pF output load capacitor.read more
Citations
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Proceedings ArticleDOI
A Highly Scalable, Time-Based Capless Low-Dropout Regulator using Master-Slave Domino Control
TL;DR: An ultra-low quiescent current capacitor-less low-drop out (LDO) regulator is proposed in this paper which is designed using domino control which automatically increases or decrease the drive strength based on load current.
Proceedings ArticleDOI
A Current Efficient 10mA Analog-Assisted Digital Low Dropout Regulator with Dynamic Clock Frequency in 65nm CMOS
TL;DR: An analog-assisted digital output capacitor-less low-drop out (LDO) regulator that regulates the output accurately eliminating the limit cycle oscillations and quantization error due to a standalone digital LDO.
Journal Article
Design of LDO Regulator in CMOS 45nm Technology
Rachana N Rao,H V Manjunath +1 more
TL;DR: It is demonstrated that in these LDOs the output voltage might be higher than the input reference voltage at minimum load current, and both the circuits begin "to follow" to achieve desired voltage with respect to load current depending on bias voltage.
References
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The flipped voltage follower: a useful cell for low-voltage low-power circuit design
Ramon G. Carvajal,Jaime Ramirez-Angulo,Antonio J. Lopez-Martin,Antonio Torralba,Juan Antonio Gómez Galán,Alfonso Carlosena,Fernando Muñoz Chavero +6 more
TL;DR: A design example showing the application of the FVF to build systems based on translinear loops is described which shows the potential of this cell for the design of high-performance low-power/low-voltage analog and mixed-signal circuits.
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A 78 dB SNDR 87 mW 20 MHz Bandwidth Continuous-Time $\Delta\Sigma$ ADC With VCO-Based Integrator and Quantizer Implemented in 0.13 $\mu$ m CMOS
M. Park,M.H. Perrott +1 more
TL;DR: A key innovation is the explicit use of the oscillator's output phase to avoid the signal distortion that had severely limited the performance of earlier VCO-based ADCs, which had made use of its output frequency only.
Journal ArticleDOI
Development of Single-Transistor-Control LDO Based on Flipped Voltage Follower for SoC
TL;DR: It is proven experimentally that the STC low-drop-out provides stable voltage regulation at a variety of output-capacitor/ESR conditions and is also stable in no output capacitor condition.
Journal ArticleDOI
External Capacitor-Less Low Drop-Out Regulator With 25 dB Superior Power Supply Rejection in the 0.4–4 MHz Range
TL;DR: This paper presents design techniques for a high power supply rejection (PSR) low drop-out (LDO) regulator that is suitable for system-on-chip (SoC) applications while maintaining the capability to reduce high-frequency supply noise.
Journal ArticleDOI
Low Drop-Out Voltage Regulators: Capacitor-less Architecture Comparison
Joselyn Torres,Mohamed El-Nozahi,Ahmed Amer,Seenu Gopalraju,Reza Abdullah,Kamran Entesari,Edgar Sanchez-Sinencio +6 more
TL;DR: In this article, the authors compared different LDO voltage regulators in terms of line/load regulation, power supply rejection, line transient, total on-chip compensation capacitance, noise, and quiescent power consumption.
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