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Journal ArticleDOI

CMOS active pixel image sensor

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TLDR
In this paper, a 2.0 /spl mu/m double-poly, double-metal foundry CMOS active pixel image sensor is reported, which uses TTL compatible voltages, low noise and large dynamic range, and is useful in machine vision and smart sensor applications.
Abstract
A new CMOS active pixel image sensor is reported. The sensor uses a 2.0 /spl mu/m double-poly, double-metal foundry CMOS process and is realized as a 128/spl times/128 array of 40 /spl mu/m/spl times/40 /spl mu/m pixels. The sensor features TTL compatible voltages, low noise and large dynamic range, and will be useful in machine vision and smart sensor applications. >

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Book ChapterDOI

CMOS Active Pixel Sensor Developments at the Rutherford Appleton Laboratory

TL;DR: This paper reports on an on-going research programme at the Rutherford Appleton Laboratory to develop science-grade CMOS Active Pixel Sensors for space science missions in which compactness, low-mass, low power, and greater radiation tolerance are advantageous.
Journal ArticleDOI

An Analog Front-End IC Design for 320 $\times$ 240 Microbolometer Array Applications

TL;DR: An analog front-end integrated circuit (IC) design for a readout IC (ROIC), which applies a fixed- voltage-bias sensing method with a capacitance transimpedance amplifier to an input stage in order to simplify the circuit structure of the ROIC and the IR sensor characteristic control, is proposed.
Proceedings ArticleDOI

Development of CMOS active pixel image sensors suitable for space applications: some preliminary results

TL;DR: In this article, the authors present preliminary results from their research on CMOS active pixel image sensors (APS) suitable for space applications where radiation hardness, random pixel readout, low power consumption and minimum volume is of particular importance.
Book ChapterDOI

Main Technological Advancements in Bacterial Bioluminescent Biosensors Over the Last Two Decades

TL;DR: This chapter retraces the history of the main technological evolutions that bacterial bioluminescent biosensors have known over the last two decades.
Proceedings ArticleDOI

Low power issues in a digital programmable artificial retina

TL;DR: In this article, power considerations are tackled at three levels: power savings from the artificial retina concept at the vision system level, power issues from the global architecture of the chip and reducing power consumption in the processing task itself.
References
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Proceedings ArticleDOI

Active Pixel Sensors: Are CCD's Dinosaurs?

TL;DR: ActivePixel Sensor (APS) as mentioned in this paper is a detector array technology that has at least one active transistor within the pixel unit cell, which eliminates the need for nearly perfect charge transfer, which makes CCD's radiation'soft' and difficult to use under low light conditions, difficult to integrate with on-chip electronics, difficulty to use at low temperatures, and difficulty to manufacture in non-silicon materials that extend wavelength response.
Journal ArticleDOI

Characterization of surface channel CCD image arrays at low light levels

TL;DR: The characterization of surface channel charge-coupled device line imagers with front-surface imaging, interline transfer, and 2-phase stepped oxide, silicon-gate CCD registers is presented in this paper.
Journal ArticleDOI

A random access photodiode array for intelligent image capture

TL;DR: In this article, a chip implementing random scan was designed, fabricated, and tested, which covers the basic requirements for random access and separation between the sampling and reading processes, in this way, a repeated reading of any pixel at any time can take place.
Journal Article

A random access photodiode array for intelligent image capture

TL;DR: A chip implementing random scan was designed, fabricated, and tested and was found to operate functionally, however, the use of a standard process gave rise to the crosstalk phenomenon, which has yet to be overcome.
Journal ArticleDOI

Architectures For Focal Plane Image Processing

TL;DR: The potential of on-chip read/write analog frame memory for image transformation and frame-to-frame processing is discussed and a new pipelined vector pixel processor architecture for medium density infrared staring focal plane arrays is described.
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