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Proceedings ArticleDOI

Performance-driven compaction for analog integrated circuits

TLDR
A novel approach to the layout compaction of analog integrated circuits which observes all of the performance and technology constraints necessary to guarantee proper analog circuit functionality is described.
Abstract
The authors describe a novel approach to the layout compaction of analog integrated circuits which observes all of the performance and technology constraints necessary to guarantee proper analog circuit functionality. The approach consists of two stages: a fast constraint graph critical path algorithm followed by a general linear programming algorithm. Circuit performance is guaranteed by mapping high-level performance constraints to low-level bounds on parasitics and then to minimum spacing constraints between adjacent nets. The algorithm has been implemented and found to display remarkable completeness and efficiency.

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Citations
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Journal ArticleDOI

PastA—the characterization of the inherent fluctuations in the fabrication process for circuit simulation

TL;DR: In this article, the authors describe a method for the complete characterization of the inherent fluctuations in the fabrication process for the simulation in IC design, which works with all technologies whether CMOS, BiCMOS or bipolar.
Journal ArticleDOI

Performance-driven circuit and layout co-optimization for deep-submicron analog circuits

TL;DR: In this article, the authors proposed a circuit and layout co-optimization scheme through a novel parasitic model-building scheme that exchanges information between the two flows, which bridges the efficiency and accuracy void between schematic and physical design optimization to ensure rapid DSM design closure.
Journal ArticleDOI

Dingo-XT: a technology description language for analog and digital IC layout

TL;DR: A thorough description of modern technology description methods is given and Dingo-XT, a language that has been designed for this purpose, is presented based on an example of a complex bipolar analog IC technology.
References
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Book

Combinatorial Algorithms for Integrated Circuit Layout

TL;DR: This paper will concern you to try reading combinatorial algorithms for integrated circuit layout as one of the reading material to finish quickly.
Journal ArticleDOI

KOAN/ANAGRAM II: new tools for device-level analog placement and routing

TL;DR: KOAN and ANAGRAM II differ from previous approaches by using general algorithmic techniques to find critical device-level layout optimizations rather than relying on a large library of fixed-topology module generators.

KOAN/ANAGRAM 11: New Tools for Device-Level Analog Placement and Routing

TL;DR: In this article, the authors describe a new tool for device-level analog placement and routing called KOAN and ANAGRAM II, which uses general algorithmic techniques to find critical devicelevel layout optimizations rather than relying on a large library of fixed-topology module generators.
Book

A Top-Down, Constraint-Driven Design Methodology for Analog Integrated Circuits

TL;DR: A top-down, constraint-driven design methodology for analog integrated circuits and some of the tools that support this methodology are described, including behavioral simulation tools, tools for physical assembly, and module generators.
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