Showing papers on "Fin (extended surface) published in 2008"

Smooth and vertical semiconductor fin structure

Abstract: A method for processing a semiconductor fin structure is disclosed. The method includes thermal annealing a fin structure in an ambient containing an isotope of hydrogen. Following the thermal annealing step, the fin structure is etched in a crystal-orientation dependent, self-limiting, manner. The crystal-orientation dependent etch may be selected to be an aqueous solution containing ammonium hydroxide (NH 4 OH). The completed fin structure has smooth sidewalls and a uniform thickness profile. The fin structure sidewalls are {110} planes.

Heat transfer enhancement by winglet-type vortex generator arrays in compact plain-fin-and-tube heat exchangers

Abstract: The potential of winglet type vortex generator (VG) arrays for air-side heat transfer enhancement is experimentally evaluated by full-scale wind-tunnel testing of a compact plain-fin-and-tube heat exchanger. The effectiveness of a 3VG alternate-tube inline array of vortex generators is compared to a single-row vortex generator design and the baseline configuration. The winglets are placed in a common-flow-up orientation for improved tube wake management. The overall heat transfer and pressure drop performance are assessed under dry-surface conditions over a Reynolds number range based on hydraulic diameter of 220 ≤ Re ≤ 960. It is found that the air-side heat transfer coefficient increases from 16.5% to 44% for the single-row winglet arrangement with an increase in pressure drop of less than 12%. For the three-row vortex generator array, the enhancement in heat transfer coefficient increases with Reynolds number from 29.9% to 68.8% with a pressure drop penalty from 26% at Re = 960 to 87.5% at Re = 220. The results indicate that vortex generator arrays can significantly enhance the performance of fin-tube heat exchangers with flow depths and fin densities typical to those used in air-cooling and refrigeration applications.

Interlayer cooling potential in vertically integrated packages

Abstract: The heat-removal capability of area-interconnect-compatible interlayer cooling in vertically integrated, high-performance chip stacks was characterized with de-ionized water as coolant. Correlation-based predictions and computational fluid dynamic modeling of cross-flow heat-removal structures show that the coolant temperature increase due to sensible heat absorption limits the cooling performance at hydraulic diameters ≤200 μm. An experimental investigation with uniform and double-side heat flux at Reynolds numbers ≤1,000 and heat transfer areas of 1 cm2 was carried out to identify the most efficient interlayer heat-removal structure. The following structures were tested: parallel plate, microchannel, pin fin, and their combinations with pins using in-line and staggered configurations with round and drop-like shapes at pitches ranging from 50 to 200 μm and fluid structure heights of 100–200 μm. A hydrodynamic flow regime transition responsible for a local junction temperature minimum was observed for pin fin in-line structures. The experimental data was extrapolated to predict maximal heat flux in chip stacks having a 4-cm2 heat transfer area. The performance of interlayer cooling strongly depends on this parameter, and drops from >200 W/cm2 at 1 cm2 and >50 μm interconnect pitch to <100 W/cm2 at 4 cm2. From experimental data, friction factor and Nusselt number correlations were derived for pin fin in-line and staggered structures.

Forced convective interlayer cooling in vertically integrated packages

Abstract: The heat removal capability of area-interconnect-compatible interlayer cooling in vertically integrated, high-performance chip stacks was characterized with de-ionized water as coolant. Correlation-based predictions and computational fluid dynamic modeling of cross-flow heat-removal structures show that the coolant temperature increase due to sensible heat absorption limits the cooling performance at hydraulic diameters les 200 mum. An experimental investigation with uniform and double-side heat flux at Reynolds numbers les 1000 and heat transfer areas of 1 cm2 was carried out to identify the most efficient interlayer heat-removal structure. Parallel plate, microchannel, pin fin, and their combinations with pins using in-line and staggered configurations with round and drop-like shapes at pitches ranging from 50 to 200 mum and fluid structure heights of 100 to 200 mum were tested. A hydrodynamic flow regime transition responsible for a local junction temperature minimum was observed for pin fin inline structures. The experimental data was extrapolated to predict maximal heat flux in chip stacks with a 4-cm2 heat transfer area. The performance of interlayer cooling strongly depends on this parameter, and drops from >200 W/cm2 at 1 cm2 and >50 mum interconnect pitch to <100 W/cm2 at 4 cm2.

Led lamp bulb structure

Abstract: A LED lamp bulb structure is disclosed, wherein a lamp controller is installed inside a lamp head and the bottom surface thereof is fixed by an upper cover At the bottom surface of the upper cover, a heat dispersing fin set, which has at least a heat conducting tube installed therein, and a lower cover are fixed therein Furthermore, a bulb housing, which has a tray mounted therein, is screwed around the peripheral edge of the lower cover, and at the bottom of the tray, plural LED lamp sets corresponding to plural heat conducting tubes are outwardly extended Therefore, the heat produced by the LED lamp set can have a heat exchange through plural heat conducting tubes and heat dispersing fin set for achieving a better heat dispersing efficiency and for more effectively dispersing the heat

Shape Optimization of Micro-Channel Heat Sink for Micro-Electronic Cooling

Abstract: A numerical investigation of 3D fluid flow and heat transfer in a rectangular micro-channel has been carried out using water as a cooling fluid in a silicon substrate. Navier-Stokes and energy equations for laminar flow and conjugate heat transfer are solved using a finite volume solver. Solutions are first carefully validated with available analytical and experimental results; the shape of the micro-channel is then optimized using surrogate methods. Ratios of the width of the micro-channel to the depth and the width of the fin to the depth are selected as design variables. Design points are selected through a four-level full factorial design. A single objective function thermal resistance, formulated using pumping power as a constraint, is optimized. Mass flow rate is adjusted by the constant pumping power constraint. Response surface approximation, kriging, and radial basis neural network methods are applied to construct surrogates and the optimum point is searched by sequential quadratic programming.

Techno‐economic study on compact heat exchangers

Abstract: Compact heat exchangers (CHEs), including plate-fin, plate and spiral plate heat exchangers, are widely used in many thermal process systems. Under certain operating condition, the optimal heat exchanger with lowest cost and highest efficiency becomes the ultimate objective pursued by engineers and researchers. In addition, an economic evaluation can also possess a major impact on the selection of technical solution and project profitability. Therefore,it is important to use a proper techno-economic approach that may give enough references to choose an appropriate alternative. This paper gives an overview of the most common methods used in the techno-economic analysis of heat exchangers. Based on the optimum designs with the objective of minimum pressure drop, an optimal CHE is selected from the technical and economic standpoints. The material purchasing, equipment abrasion and power consumption have been considered comprehensively.

Comparison of Fluid Flow and Thermal Characteristics of Plate-Fin and Pin-Fin Heat Sinks Subject to a Parallel Flow

Abstract: In this study, we compare the thermal performances of the two types of heat sinks most commonly used in the electronic equipment cooling: plate-fin and pin-fin heat sinks. In order to obtain the fluid flow and thermal characteristics of heat sinks, an experimental investigation is conducted. Based on the experimental results of the present study and the available data from the existing literature, the correlations of the friction factor and the Nusselt number are suggested for each type of heat sink. Correlations for the pin-fin heat sinks are newly developed, while correlations for the plate-fin heat sinks are selected from previous models. By using the appropriate correlations, thermal resistances of the optimized plate-fin and pin-fin heat sinks are compared under fixed pumping power conditions. Finally, a contour map, which depicts the ratio of the thermal resistances of the optimized plate-fin and pin-fin heat sinks as a function of dimensionless pumping power and dimensionless length, is presented. ...

Systems and devices including local data lines and methods of using, making, and operating the same

Abstract: Disclosed are methods, systems and devices, including a device having a fin field-effect transistor with a first terminal, a second terminal, and two gates. In some embodiments, the device includes a local data line connected to the first terminal, at least a portion of a capacitor plate connected to the second terminal, and a global data line connected to the local data line by the capacitor plate.

An absorption based miniature heat pump system for electronics cooling

Abstract: The development of an absorption based miniature heat pump system is motivated by the need for removal of increasing rates of heat from high performance electronic chips such as microprocessors. The goal of the present study is to keep the chip temperature near ambient temperature, while removing 100 W of heat load. Water/LiBr pair is used as the working fluid. A novel dual micro-channel array evaporator is adopted, which reduces both the mass flux through each micro-channel, as well as the channel length, thus reducing the pressure drop. Micro-channel arrays for the desorber and condenser are placed in intimate communication with each other using a hydrophobic membrane. This acts as a common interface between the desorber and the condenser to separate the water vapor from LiBr solution. The escaped water vapor is immediately cooled and condensed at the condenser side. For direct air cooling of condenser and absorber, offset strip fin arrays are used. The performance of the components and the entire system is numerically evaluated and discussed.

Enhancement of natural convection heat transfer from a fin by triangular perforation of bases parallel and toward its tip

Abstract: This study examines the heat transfer enhancement from a horizontal rectangular fin embedded with triangular perforations (their bases parallel and toward the fin tip) under natural convection. The fin’s heat dissipation rate is compared to that of an equivalent solid one. The parameters considered are geometrical dimensions and thermal properties of the fin and the perforations. The gain in the heat transfer enhancement and the fin weight reduction due to the perforations are considered. The study shows that the heat dissipation from the perforated fin for a certain range of triangular perforation dimensions and spaces between perforations result in improvement in the heat transfer over the equivalent solid fin. The heat transfer enhancement of the perforated fin increases as the fin thermal conductivity and its thickness are increased.

Multiobjective Optimization of Staggered Elliptical Pin-Fin Arrays

Abstract: This work presents a numerical procedure for multiple objectives to optimize staggered elliptic-shaped short pin-fin arrays. The multiobjective problem is to achieve an acceptable compromise between augmentation of turbulent heat transfer and reduction in friction loss. Four nondimensional variables, pin-fin height-to-channel height ratio, major axis length-to-channel height ratio, minor-axis length-to-channel height ratio, and pin-fin pitch-to-channel height ratio are chosen as design variables. The D-optimal method is used to determine the training points. The response surface method is used to approximate the Pareto optimal front with Reynolds-averaged Navier-Stokes analysis of the flow and heat transfer using the shear stress transport (SST) turbulence model. The Pareto-optimal solutions are obtained using a combination of an evolutionary algorithm and a local search.

Heat transfer enhancement for laminar natural convection along a vertical plate due to sub-millimeter-bubble injection

Abstract: Sub-millimeter-bubble injection is one of the most promising techniques for enhancing heat transfer for the laminar natural convection of liquids. However, flow and heat transfer characteristics for laminar natural convection of water with sub-millimeter bubbles have not yet been fully understood. The purpose of this study is to experimentally clarify the effects of sub-millimeter-bubble injection on the laminar natural convection of water along a heated vertical plate. The use of thermocouples and a particle tracking velocimetry (PTV) technique are applied to temperature and velocity measurements, respectively. The temperature measurement shows that the ratio of the heat transfer coefficient with sub-millimeter-bubble injection to that without injection increases with an increase in the bubble flow rate or a decrease in the wall heat flux and that the ratio ranges from 1.35 to 1.85. Moreover, it is concluded from simultaneous measurement of temperature and velocity that the heat transfer enhancement is directly affected by flow modification due to bubbles rising near the heated vertical plate.

Fin field effect transistor structures having two dielectric thicknesses

Abstract: Fin field-effect-transistor (finFET) structures having two dielectric thicknesses are generally described. In one example, an apparatus includes a semiconductor substrate, a semiconductor fin coupled with the semiconductor substrate, the semiconductor fin having at least a first surface, a second surface, and a third surface, the third surface being substantially parallel to the first surface and substantially perpendicular to the second surface, a spacer dielectric coupled to the second surface of the semiconductor fin, a back gate dielectric having a back gate dielectric thickness coupled to the first surface of the semiconductor fin, and a front gate dielectric having a front gate dielectric thickness coupled to the third surface of the semiconductor fin wherein the back gate dielectric thickness is greater than the front gate dielectric thickness