Showing papers on "Insulated-gate bipolar transistor published in 1996"

Trends in power semiconductor devices

Abstract: This paper reviews recent trends in power semiconductor device technology that are leading to improvements in power losses for power electronic systems. In the case of low voltage ( 100 V) power rectifiers, the silicon P-i-N rectifier continues to dominate but significant improvements are expected by the introduction of the silicon MPS rectifier followed by the GaAs and SiC based Schottky rectifiers. Equally important developments are occurring in power switch technology. The silicon bipolar power transistor has been displaced by silicon power MOSFETs in low voltage ( 100 V) systems. The process technology for these MOS-gated devices has shifted from V-MOS in the early 1970s to DMOS in the 1980s, with more recent introduction of the UMOS technology in the 1990s. For the very high power systems, the thyristor and GTO continue to dominate, but significant effort is underway to develop MOS-gated thyristors (MCTs, ESTs, DG-BRTs) to replace them before the turn of the century. Beyond that time frame, it is projected that silicon carbide based switches will begin to displace these silicon devices.

Interaction of drive modulation and cable parameters on AC motor transients

Abstract: This paper investigates overvoltage transients on AC induction motors when connected through a cable of arbitrary length to a variable frequency drive (VFD) consisting of a pulsewidth modulation (PWM) inverter with insulated gate bipolar transistor (IGBT) power devices. Factors contributing to a motor overvoltage transient equal to a theoretical twice DC bus voltage are first described using existing transmission line analysis. A critical cable distance I/sub c/ is defined where this 2-pu overvoltage occurs. However, literature is lacking on flow motor voltage transients >2-pu bus voltage and up to 3-4 pu are generated. This phenomenon is observed on all PWM inverters with output cable lengths greater than l/sub c/ distance. Contributing factors to the >2-pu overvoltage phenomenon are investigated by exploring the complex interaction between drive modulation techniques, carrier frequency selected, cable natural frequency of oscillation, cable high-frequency damping losses, and, to a lesser extent, inverter output rise time. Theoretical calculations of cable frequency and damping are correlated with simulation and experimental results. Novel modifications to the PWM modulator, as well as external hardware apparatus, are proposed solutions to the >2-pu overvoltage problem; both are simulated and experimentally confirmed.

Zero voltage and zero current switching full bridge PWM converter using secondary active clamp

Abstract: A new zero voltage and zero current switching (ZVZCS) full bridge (FB) PWM converter is proposed to improve the performance of the previously presented ZVZCS-FB-PWM converters. By adding a secondary active clamp and controlling the clamp switch moderately, ZVS (for leading leg switches) and ZCS (for lagging leg switches) are achieved without any lossy components, the reverse avalanche break down of leading-leg IGBTs or the saturable reactor in the primary. Many advantages including simple circuit topology, high efficiency, and low cost make the new converter attractive for high voltage and high power (>10 kW) applications. The principle of operation is explained and analyzed. The features and design considerations of the new converter are also illustrated and verified on a 1.8 kW, 100 kHz IGBT based experimental circuit.

Riding the reflected wave-IGBT drive technology demands new motor and cable considerations

Abstract: Drive manufacturer migration to insulated gate bipolar transistor (IGBT) output devices demands a more careful selection of motors and load cables. IGBT drives have faster output voltage risetimes which have increased the dielectric voltage stress placed on the motor. Semiconductor risetime now has a greater influence on motor transient voltages, emphasizing the need to understand the reflected wave phenomenon and its system effects on both motors and cables. Issues and solutions relative to motor selection, cable selection, and installation are outlined and discussed. Potential problems and solutions not commonly known even among experienced drive users are presented.

An improved soft switching PWM FB DC/DC converter for reducing conduction losses

Abstract: An improved soft-switching topology of a full-bridge (FB) pulsewidth-modulated (PWM) DC/DC converter is described. The new topology employs an energy-recovery snubber to minimize a circulating current flowing through the transformer and switching devices. By using an energy-recovery snubber instead of adding a tapped inductor and a saturable reactor to reduce RMS current stress, the converter achieves zero-current switching (ZCS) for the right leg due to the minimized circulating current and achieves zero-voltage switching (ZVS) for the left leg due to the reflected output current during the interval of left leg transition. Both analysis and experiments are performed to verify the proposed topology by implementing a 7 kW (120 VDC, 58 A) 30 kHz insulated gate bipolar transistor (IGBT) based experimental circuit.

A 50-150 kHz half-bridge inverter for induction heating applications

Abstract: A half-bridge resonant-type IGBT inverter suitable for heating magnetic and nonmagnetic materials at high-frequency is described A series-parallel arrangement of capacitors is adopted and an optimum mode of operation is proposed In this mode, the inverter is operated at unity power factor by PLL control irrespective of load variations, with maximum current gain, maximum overall system efficiency, and practically no voltage spikes in the devices at turn-off The actual performance was tested on a 50-150 kHz prototype rated at 6 kW The low-cost developed hybrid inverter is characterized by its simplicity of design and operation, yet is versatile in performance A simplified analysis and detailed experimental results are presented

An extended model of power losses in hard-switched IGBT-inverters

Abstract: This paper proposes a new improved method to describe the power losses in hard-switched IGBT-inverters. The method includes dependency of voltage, current and temperature which enables the user to simulate thermal effects very quickly. The model is used on both a PT and NPT IGBT-module including the free-wheeling diode. Methods to extract the perimeters to the models are proposed and they are verified by measurements and simulation. It is concluded that the proposed model can describe the losses in IGBT-inverters accurately and a tool for simulating thermal effects is obtained.

Sensorless current control for active rectifiers

Abstract: A novel model-based sensorless-input current controller for three-phase active rectifiers is presented. The proposed algorithm is based upon a load-conductance rectifier controller, which was previously implemented using current sensors. The paper presents analytical studies and simulation results and discusses a simple implementation using a low cost integrated microcontroller. Experimental verification utilizes an active input/output insulated gate bipolar transistor (IGBT) converter. Simulation and experimental results for the proposed controller are compared to that of the sensor-based version to validate the efficacy of this novel algorithm.

Dynamics of power MOSFET switching under unclamped inductive loading conditions

Abstract: The parasitic bipolar transistor inherent in a vertical power DMOSFET structure can have a significant impact on its reliability. Unclamped Inductive Switching (UIS) tests were used to examine the reliability of DMOSFET's in extremely harsh switching conditions. The reliability of a power DMOSFET under UIS conditions is directly related to the amount of avalanche energy the device can survive. A number of DMOSFET structures were critically examined under UIS conditions to determine the impact of bipolar transistor parameters on device reliability. The UIS dynamics were studied based on the results obtained from an advanced mixed device and circuit simulator in which the internal carrier dynamics were evaluated under boundary conditions imposed by the circuit operation. It is shown that premature open base bipolar transistor breakdown can occur when the p-base sheet resistance is high. A device structure with a shallow self-aligned p/sup +/ region is shown to prevent the parasitic bipolar turn-on and avoid premature UIS breakdown without compromising the power-switching efficiency. The simulation results are shown to be in excellent agreement with the measured data under a wide range of inductive loading conditions.

An innovative EMI reduction design technique in power converters

Abstract: The present paper deals with the problem of reducing electromagnetic interference (EMI) of switched-mode power converters using gate controlled devices such as IGBTs and power MOSFETs. In order to reduce power losses, these systems rely on fast on/off time pulses, thus producing emissions due to the high-frequency spectral content of pulses. An original design method for switched-mode power supplies is developed allowing to obtain an acceptable compromise between power losses and EMI. Emphasis is placed on the analysis of the commutation cell of the switching static converter in order to demonstrate that it is possible to control the emissions of the device by handling the parameters of the driver circuit. Theoretical analysis is discussed and compared with experimental results of the investigation on the spectrum amplitude of the emissions.

Microelectronics: An Integrated Approach

Abstract: 1. Introduction to Microelectronics. Introduction. The Digital Inverter. Microelectronic Sensing Systems. Memories. 2. Semiconductor Physics and IC Technology. Pure Semiconductors. Generation, Recombination, and Thermal Equilibrium. Doping. Carrier Transport. Silicon Integrated Circuit Technology. C Resistors. 3. pn Junction and MOS Electrostatics. Applied Electrostatics. Carrier Concentration and Potential in Thermal Equilibrium. The PN Junction in Thermal Equilibrium. The PN Junction Under Reverse Bias. Depletion Capacitance. The MOS Capacitor: A First Pass. The Electrostatics of the MOS Capacitor. Capacitance of the MOS Structure. 4. The MOS Field-Effect Transistor. Introduction. Device Physics of MOSFET: Drain Current and Channel Charge. MOSFET Device Physics: A First Pass. MOSFET Device Physics: the Gradual Channel Approximation. MOSFET Circuit Models. Level I DC Model 35. 5. Digital Circuits Using Mos Transistors. Logic Concepts. Inverter Characteristics. MOS Inverter Circuits. CMOS Inverter Analysis. Static CMOS Logic Gates. Dynamic Logic. Pass Transistor Logic. 6. The pn Junction Diode. pn Diode Circuit Symbol and Terminal Characteristics. Integrated Circuit pn Diodes. The pn Junction Diode: A First Pass. pn Junction Diode Circuit Models. SPICE Model of the pn Junction Diode. Device Physics of the pn Junction Diode: Non-Equilibrium Minority Carrier Recombination. The Continuity Equation. Minority Carrier Distributions and Current Components: A Second Pass. Diode Applications. 7. The Bipolar Junction Transistor. Introduction. Bipolar Junction Transistor Physics: A First Pass. Reverse Active and Saturation Operating Regions. The Ebers-Moll Equations. Small-Signal Model of the npn BJT. BJT Device Physics. Lateral pnp Bipolar Transistor. SPICE Models for Bipolar Junction Transistors. 8. Single-State Bipolar/MOS Transistor Amplifiers. General Amplifier Concepts. Common-Emitter Amplifier-Introduction. Common-Source Amplifier-Introduction. Current Source Supplies. Common-Source Amplifier with Current Source Supply. Common-Emitter Amplifier with Current Source Supply. Improved Transconductance Amplifier with Emitter Degeneracy Resistor. Common-Base/Gate Amplifier. 9. Multistage Amplifiers. MOS Multistage Amplifiers-Small Signal Description. BiCMOS Multistage Amplifiers-Small Signal Description. BiCMOS Multistage Amplifiers-Small Signal Description. Direct-coupled Amplifiers-Large Signal Analysis. DC Voltage and Current Sources. A Two-Stage Transconductance Amplifier. Analysis of a BiCMOS Voltage Amplifier. Exercise and Problems. 10. Frequency Response. Bode Plots. Device Models for Frequency Response Analysis. Short-Circuit Current Gain. Voltage Gain Amplifiers. Frequency Response of Common-Collector/Drain Voltage Buffer. Common-Base/Gate Amplifier-Current Buffer. Frequency Response of Multistage Amplifiers. 11. Differential Amplifiers. General Concepts for Differential Amplifiers. Small Signal Analysis of Differential Amplifiers. Two-Port Model for the Differential Amplifier. Frequency Response of Differential Amplifiers. Differential Amplifiers with Single-Ended Outputs. Large Signal Analysis of Differential Amplifiers. Exercises and Problems. 12. Feedback and Operational Amplifiers. Introduction: Amplifier Models and the Feedback Concept. Frequency Response of Feedback Amplifiers. Large-Signal Benefits of Feedback. Practical Feedback Amplifiers. Integrated Operational Amplifiers. BiCOMS Operational Amplifiers. 13. MOS Memories. Memory Classification. MOS Memory Architecture. Memory Cells. Sense Amplifiers. Address Decoders and Buffers. SRAM Design Example. Exercises and Problems.

Behavioral modeling of the IGBT using the Hammerstein configuration

Abstract: The Hammerstein model configuration, which includes a nonlinear static block followed by a linear dynamic block, is applied to model the static and dynamic characteristics of the insulated gate bipolar transistor (IGBT). Using least-squares methods, the parameters in the behavioral model can be extracted from the electrical measurements of physical devices or from the circuit simulations of physics-based models. A single set of extracted parameters has been found to yield satisfactory efficiency and accuracy for the tested hard- and soft-switched converters under prescribed ranges of operating conditions.

A matrix converter using reverse blocking NPT-IGBTs and optimized pulse patterns

Abstract: The paper compares three-phase to three-phase IGBT matrix converters in which required four-quadrant switches are realized by conventional common collector configurations and a sophisticated semiconductor loss model is used to compute the converter losses for both switch configurations. New pulse patterns are derived to minimize the input current harmonics.

Transformer isolated driver for power transistor using frequency switching as the control signal

Abstract: A driver for a power transistor (a MOSFET or IGBT) uses a transformer to isolate the power supply from the control signal, but uses very low power components on the isolated side to allow use of a physically small transformer. The control signal is one of two frequencies, and the isolated side of the driver includes a circuit for detecting which of the two frequencies is present. One frequency is preferably twice as much as the other. The output of the frequency detection circuit switches between low and high states depending on the frequency present, and the output of this circuit is connected to the input of a transistor driver circuit which charges the gate of the power transistor.

A new large signal HBT model

Abstract: Several effects important for large signal operations of heterojunction bipolar transistor (HBTs) were not included in the previous HBT models used in most commercial circuit simulators. Exclusion of these effects resulted in large discrepancies between modeled and measured device characteristics. This paper presents a new large signal HBT model which takes into account those important effects for the device operation. The effects have been identified from measured device characteristics and can be justified from first principles. To make it easy to use, the model is made up of the elements available from SPICE. During the course of the model development, an extraction procedure for the model parameters has been established to minimize the uncertainty of the extracted parameter values. The new model has been applied to HBTs with various emitter sizes and excellent agreement has been achieved between modeled and measured data over a wide range of bias conditions and signal frequencies.

Experimental comparison of motor bearing currents with PWM hard and soft switched voltage source inverters

Abstract: This paper compares motor bearing currents due to pulsewidth modulation (PWM) hard- and soft-switched inverters. The mechanisms for bearing currents are first identified using an approach based on direct small-signal excitation of the motor bearing with sinusoidal and square-wave signals to characterize the bearings. It is shown that many of the motor models that have been proposed in the literature to explain bearing currents do not adequately explain the observed higher frequency effects. The paper also outlines some of the important phenomena which need to be considered for a more complete description of bearing currents. Finally, the paper compares the performance of hard and soft-switched inverters with respect to bearing currents and shaft voltage. Experimental results are provided for PWM hard- and soft-switched insulated gate bipolar transistor (IGBT) inverters which have exactly the same power circuit layout, identical chassis, and rating of 70 kVA.

Gate-Controlled dv/dt- and di/dt-Limitation in High Power IGBT Converters

Abstract: A central issue in reducing the size and cost of IGBT power converters is to control or limit dv/dt and di/dt during the switching process. Load side snubbers and clamp circuits are bulky and expensive. Increasing the gate resistors values is cheap and simple but switching times as well as power losses are increased.In this article the authors suggest to use a gate-side control loop to limit the switching transients. No extra Components are needed on the load side since the internal stray inductance of the power module is used to sense the current. The only extra component is a high voltage capacitor of some picoforads to sense the voltage transients. The overall losses are reduced compared to the traditional method, where the gate resistor value is increased to limit the switching speed. The proposed method can easily be integrated in an intelligent gate-drive circuit.

Thermal reliability of power insulated gate bipolar transistor (IGBT) modules

Abstract: Thermal behavior of power insulated gate bipolar transistor (IGBT) modules was studied in this paper experimentally. Due primarily to the thermal mismatch in IGBT sandwich structure, thermal stress induced solder fatigue failures, such as the forming and growing of voids and cracks in IGBT solder layers, were quasi-dynamically observed in thermal cycling test. Thermal stress simulation provided stress distribution and bending deformation in IGBT packaging numerically, which is in agreement with the test results. Emitter bonding wire lifting failure and local overheat induced chip burn-out failure, both observed in intermittent operating test, indicate that thermal nonuniform distribution is a main reason affecting IGBT reliability. The study results of this paper are profitable to high reliable IGBT module manufacture and application.

Optimized design of a complete three-phase PWM-VS inverter

Abstract: This paper introduces and discusses the optimized design of power electronic circuits as a tool for flexible and fast computer-aided design. A design center concept, based on both optimization and design, is defined. The concept is used on a complete three-phase voltage-source inverter (VSI), with a focus on the optimization part. The optimization is performed in order to obtain maximum efficiency by changing the gate-drive conditions, like gate resistances and gate-drive supply. Another optimization is performed, where the thermal characteristic of the diode and insulated gate bipolar transistor (IGBT) is taken into account. A loss model of a complete three-phase VSI is developed. Based on known data for the IGBTs, the diodes and inverter circuit, the outputs of the proposed optimizer are two gate-drive resistances, a gate-drive supply and a load current, which give the inverter the highest efficiency. It is concluded the optimization points of the inverter design are different using the two proposed optimization criteria. The highest load current for the same devices is found for the inverter when the thermal effects are included. Finally, parts of the loss model are verified with experiments.

Modelling of lateral bipolar devices in a CMOS process

Abstract: In spite of the emergence of CMOS technology, the well-controlled characteristics of bipolar transistors retain many advantages over those of CMOS transistors for some critical analog applications. This is the reason why special technologies have been proposed to combine both types of transistors on the same chip. An inexpensive and widely applicable approach lies in using bipolars that are realisable with existing CMOS technologies. Bipolar transistors occur as parasitic devices in CMOS and it is not necessary to use additional processing steps in their manufacture. These bipolar transistors, therefore, provide cost effective devices which are relatively simple to fabricate. The extraction of a DC parameter set for the lateral device is more complicated than for a vertical device because of the presence of two parasitic vertical bipolar transistors which are formed by the emitter/collector, the base and the substrate regions. This paper proposes a method which involves the use of subcircuits incorporating three SPICE Gummel-Poon models. The development of this model, its implementation and the results obtained are outlined and discussed.

Drive circuit of semiconductor device

Abstract: PROBLEM TO BE SOLVED: To obtain a drive circuit which facilitates both the suppression of a voltage surge and the reduction of a switching loss and, further, can be applied to all IGBT(insulated gate self-extinguishing type) devices. SOLUTION: A drive circuit is composed of a 1st drive means 12 which drives an IGBT device 1, a 2nd drive means 13 which drives the IGBT device at a speed slower than the speed of the 1st drive means 12, a switching means 11 by which the output of the 1st drive circuit 12 and the output of the 2nd drive circuit 13 are switched from one to the other and supplied to the gate of the IGBT device 1 and a current decrease start point detecting means 14 which detects the time point when the current decrease starts in a transition period from a 1st period in which the collector current of the IGBT device changes gradually to a 2nd period which follows the 1st period and in which the collector current changes sharply when the IGBT device 1 is turned off. The switching means 11 is operated by the output of the current decrease start point detecting means 14 so as to use the 1st drive means 12 in the 1st period and use the 2nd drive means 13 in the 2nd period. COPYRIGHT: (C)1998,JPO

A direct coupled 4-quadrant multilevel converter for 16 2/3 Hz traction systems

Abstract: The main fields of applications are today especially broadcast amplifiers and fast power-supplies for plasma physics or neutral Beam Injection. The fisrst interests on the proposed technique is the series connected step inverter stages, which represents a mature solution as an alternative to the true series connection of a great number of modern turn-on and turn-off power semiconductor devices.

Protection arrangement for a switching device

Abstract: To protect a switching device having a possible open-circuit failure condition, an arrangement is featured in which a thyristor is connected in parallel with the main current-carrying terminals of the switching device to be protected. The thyristor is connected so that the forward current direction of the thyristor is the same as the normal current direction through the main terminals of the switching device. The arrangement provides for the thyristor to present an irreversible effective short-circuit when its normal parameter ratings are exceeded. The protection arrangement is particularly suitable for insulated-gate bipolar transistors (IGBT's) and preferably employs a pressure-packaged asymmetrical thyristor (ASCR) as the protection thyristor. The ASCR should be selected to withstand the normal (snubber-limited) dV/dt of the voltage across the switching device.

Three-dimensional thermal modeling based on the two-port network theory for hybrid or monolithic integrated power circuits

Abstract: This paper recalls how the two-port network theory can be extended to three-dimensional (3-D) conductive heat transfer in multilayered plane structures. Then it is shown how to build efficient computation tools by implementing this theory with help of fast Fourier transform (FFT) algorithms. These tools are particularly well-suited for the rapid thermal analysis of power components or hybrid and integrated power circuits. An illustration is given concerning thermal analysis of an insulated gate bipolar power transistor (IGBT) power module and computed results are compared with experiment.

A comparison of voltage mode soft switching methods for PWM converters

Abstract: A comparison study was conducted to characterize the loss mechanisms, component stresses, and overall efficiencies of a group of voltage mode soft switching PWM methods including two improvement circuits developed at UCI. All soft switching methods in the selected group allow zero voltage turn-on and turn-off of the main switch and utilize a single auxiliary switch with some resonant components. Advantages and disadvantages were identified for each method. Experimental verification for each soft switching method were provided.

Physical modeling of lateral scaling in bipolar transistors

Abstract: The dependence of important transistor characteristics, such as transit frequency, on emitter width and length is modeled on a physical basis. Closed-form explicit analytical equations are derived for modeling the emitter size dependence of the low-current minority charge and transit time, the critical current indicating the onset of high injection in the collector, and the stored minority charge in the collector at high injection. These equations are suited for application in various compact transistor models such as the SPICE Gummel-Poon model (SGPM) as well as the advanced models HICUM and MEXTRAM. As demonstrated by two- and three-dimensional device simulation and measurements, combination of the derived equations with HICUM results in accurate prediction of the characteristics of transistors with variable emitter length and width. As a consequence, the new model makes the conventional transistor library unnecessary and offers bipolar circuit designers the flexibility to use the transistor size that fits the application best.

Large-signal modeling of self-heating, collector transit-time, and RF-breakdown effects in power HBTs

Abstract: A large-signal heterojunction bipolar transistor (HBT) model has been developed which includes self-heating, collector transit-time, and RF-breakdown effects. The model has a compact form which is based on a compromise between accuracy and utility. As such, the model can be readily extracted and verified with the aid of RF waveform measurements. Using the model in simulations, it was found that RF breakdown was dependent on base biasing and loading conditions. Therefore, with proper circuit design, the maximum output power of the HBT can significantly exceed the limit of open-base breakdown voltage.

Power application circuits utilizing bidirectional insulated gate bipolar transistor

Abstract: A matrix converter utilizes a bidirectional lateral insulated gate bipolar transistor (IGBT) including two gate electrodes. The IGBT can conduct in two directions. The matrix converter preferably is a three phase matrix converter including nine bidirectional IGBT switches. The IGBT switches are controlled by a control circuit which includes eighteen control lines, two for each IGBT. Additionally, the bidirectional IGBT can be used in a precharge circuit of a power inverter or in a dynamic brake associated with a motor controller.

Bidirectional lateral insulated gate bipolar transistor

Abstract: A bidirectional lateral insulated gate bipolar transistor (IGBT) includes two gate electrodes. The IGBT can conduct current in two directions. The IGBT relies on a RESURF operation to provide high voltage blocking in both directions. The IGBT is symmetrical, having N-type drift region in contact with an oxide layer. A P-type region is provided above the N-type-drift region, having a portion more heavily doped with P-type dopants. The RESURF operation can be provided by a buried oxide layer or by a P substrate or by a horizontal PN junction. The IGBT can be utilized in various power operations, including a matrix switch or a voltage source converter.

The MTO thyristor-a new high power bipolar MOS thyristor

Abstract: A new high power bipolar MOS thyristor, the MTO/sup TM/ thyristor, is a latching device which extends the limited capabilities of the MCT and IGBT to higher power and blocking voltage. The MTO thyristor plan fits well, beginning at a blocking voltage level where the other bipolar MOS devices are believed to have a ceiling of diminishing returns, that is above 3000 V. The MTO thyristor is easily accommodated to the conventional disk-type package for double sided cooling and permits design voltage opportunity to that achieved for thyristors, e.g., 9000 V. Feasibility of concept has been established and development for specific designs is well underway.