Showing papers on "Silicon nitride published in 2002"

Formation of tough interlocking microstructures in silicon nitride ceramics by dynamic ripening

Abstract: Ceramics based on Si3N4 have been comprehensively studied and are widely used in structural applications1, 2. The development of an interlocking microstructure of elongated grains is vital to ensur ...

Method of forming a multilayer dielectric stack

Abstract: A multilayer dielectric stack is provided which has alternating layers of a high-k material and an interposing material. The presence of the interposing material and the thinness of the high-k material layers reduces or eliminate effects of crystallization within the high-k material, even at relatively high annealing temperatures. The high-k dielectric layers are a metal oxide of preferably zirconium or hafnium. The interposing layers are preferably amorphous aluminum oxide, aluminum nitride, or silicon nitride. Because the layers reduce the effects of crystalline structures within individual layers, the overall tunneling current is reduced. Also provided are atomic layer deposition, sputtering, and evaporation as methods of depositing desired materials for forming the above-mentioned multilayer dielectric stack.

Synthesis of Porous Silicon Nitride with Unidirectionally Aligned Channels Using Freeze-Drying Process

Abstract: Porous silicon nitride with macroscopically aligned channels was synthesized using a freeze-drying process. Freezing of a water-based slurry of silicon nitride was done while unidirectionally controlling the growth direction of the ice. Pores were generated subsequently by sublimation of the columnar ice during freeze-drying. By sintering this green body, a porous silicon nitride with high porosity (over 50%) was obtained and its porosity was controllable by the slurry concentration. The porous Si 3 N 4 had a unique microstructure, where macroscopically aligned open pores contained fibrous grains protruding from the internal walls of the Si 3 N 4 matrix. It is hypothesized that vapor/solid phase reactions were important to the formation mechanism of the fibrous grains.

Silicon Nitride Ceramics

Abstract: Silicon nitride ceramics is a generic term for a variety of alloys of Si3N4 with additional compounds necessary for a complete densification of the Si3N4 starting powder. They are heterogeneous, multicomponent materials characterised by the inherent properties of the crystalline modifications α and β of Si3N4 and the significant influence of the densification additives. With a view to ability of the α and β modification to form solid solutions α-Si3N4 (αss) and β-Si3N4 (βss) solid solutions can be distinguished. Each group contains engineered materials with interesting properties for special applications. Phase relations and micro-structures determine the properties decisively. Composition of the phases, the distribution of the grains, their aspect ratio and the grain boundary phase are pronounced microstructural features. The formation of the microstructure strongly depends on the one hand on the quality of the Si3N4 starting powders, which closely is related to the chemistry of the production process, and on the other on the liquid phase sintering as the most important step in the densification route. The interrelation between pure Si3N4, the densification of the powder including the role of sintering additives, microstructural engineering, physicochemical properties of the sintered Si3N4 ceramics (SSN, GPSN, HPSN, HIP-SSN, HIP-SN) are described in more detail and compared to reaction bonded Si3N4 ceramics (RBSN), which are produced by nitridation of silicon powders.

Plasma etch resistant coating and process

Abstract: A protective coating is provided herein and methods of using the protective coating for susceptors used in semiconductor deposition chambers are described. In the preferred embodiments, CVD chamber equipment, such as a susceptor, is protected from plasma etch cleaning. Prior to CVD of silicon nitride, the chamber equipment is first coated with an emissivity-stabilizing layer, such as silicon nitride. This layer is then superficially oxidized. After repeated cycles of deposited silicon nitride upon different substrates in sequence, the chamber is emptied of wafers and a plasma cleaning process is conducted. Plasma cleaning is preferably selective against the silicon oxynitride protective coating. After the plasma cleaning process, the emissivity-stabilizing layer is reapplied, oxidized, and a plurality of deposition cycles can commence again.

Method of forming a barrier film and method of forming wiring structure and electrodes of semiconductor device having a barrier film

Abstract: There is provided a method of forming a barrier metal which is designed to be interposed between a metal layer and an insulating layer, both constituting a multi-layered structure of semiconductor device, the method comprising the steps of positioning a substrate having the insulating layer formed thereon at a predetermined position inside a processing vessel forming a processing space, and alternately introducing a gas containing a refractory metallic atom, a gas containing Si atom and a gas containing N atom into the processing vessel under a predetermined processing pressure, thereby allowing a refractory metal nitride or a refractory metal silicon nitride to be deposited on the insulating layer by way of atomic layer deposition.

Combined gate cap or digit line and spacer deposition using HDP

Abstract: A method for fabricating gate electrodes and gate interconnects with a protective silicon oxide or silicon nitride cap and spacer formed by high density plasma chemical vapor deposition (HDPCVD). Silicon oxide or silicon nitride is deposited in a reaction zone of a HDPCVD reactor while providing two or more selected substrate bias powers, source powers and/or selected gas mixtures to tailor the shape and thickness of the film for desired applications. In one embodiment, a low bias power of below 500 Watts is provided in a first stage HDPCVD and the bias power is then increased to between 500 and 3000 Watts for a second stage to produce a protective film having thin sidewall spacers for enhanced semiconductor device density and a relatively thick cap.

Plasma etching of silicon carbide

Abstract: A process for plasma etching silicon carbide with selectivity to an overlying and/or underlying dielectric layer of material. The dielectric material can comprise silicon dioxide, silicon oxynitride, silicon nitride or various low-k dielectric materials including organic low-k materials. The etching gas includes a chlorine containing gas such as Cl2, an oxygen containing gas such as O2, and a carrier gas such as Ar. In order to achieve a desired selectivity to such dielectric materials, the plasma etch gas chemistry is selected to achieve a desired etch rate of the silicon carbide while etching the dielectric material at a slower rate. The process can be used to selectively etch a hydrogenated silicon carbide etch stop layer or silicon carbide substrate.

Process integration of self-assembled polymer templates into silicon nanofabrication

Abstract: Self-assembled diblock copolymer thin films are used as sacrificial layers for the transfer of dense nanoscale patterns into more robust materials. We detail the processes used to achieve highly uniform nanoporous dielectric films, high-aspect-ratio nanotextured silicon, silicon nitride dot arrays, silicon pillar arrays, and silicon tip arrays. All techniques are compatible with standard semiconductor fabrication processes. We also discuss the possible applications of each resulting nanometer-scale structure, including high surface area substrates for capacitors and biochips, quantum dot arrays for nonvolatile memories, and silicon pillar arrays for vertical transistors or field-emission displays.

A high-density plasma process for depositing a layer of Silicon Nitride

Abstract: A high-density plasma process is proposed for depositing a layer of Silicon Nitride on a substrate in a plasma reactor. The process includes the steps of: providing a gas including precursor components of the Silicon Nitride, generating a plasma applying a radio-frequency power to the gas, and the plasma reacting with the substrate to deposit the layer of Silicon Nitride. The power applied to the gas is in the range from 2.5 kW to 4 kW.

Integration of titanium and titanium nitride layers

Abstract: Embodiments of the present invention generally relate to an apparatus and method of integration of titanium and titanium nitride layers. One embodiment includes providing one or more cycles of a first set of compounds, providing one or more cycles of a second set of compounds, and providing one or more cycles of a third set of compounds. One cycle of the first set of compounds includes introducing a titanium precursor and a reductant. One cycle of the second set of compounds includes introducing the titanium precursor and a silicon precursor. One cycle of the third set of compounds includes introducing the titanium precursor and a nitrogen precursor. Another embodiment includes depositing a titanium layer utilizing titanium halide. Then, a passivation layer is deposited over the titanium layer utilizing titanium halide. The passivation layer may comprise titanium silicide, titanium silicon nitride, and combinations thereof. Then, a titanium nitride layer is deposited over the passivation layer utilizing titanium halide. Still another embodiment comprises depositing a titanium layer over a surface of a substrate. Then, the titanium layer is treated with a soak with a silicon precursor at a substrate temperature of about 550° C. or less to form a treated titanium layer. Then, a titanium nitride layer is deposited over the treated titanium layer.

Multiple precursor cyclical deposition system

Abstract: Embodiments of the present invention relate to an apparatus and method of cyclical deposition utilizing three or more precursors in which delivery of at least two of the precursors to a substrate structure at least partially overlap. One embodiment of depositing a ternary material layer over a substrate structure comprises providing at least one cycle of gases to deposit a ternary material layer. One cycle comprises introducing a pulse of a first precursor, introducing a pulse of a second precursor, and introducing a pulse of a third precursor in which the pulse of the second precursor and the pulse of the third precursor at least partially overlap. In one aspect, the ternary material layer includes, but is not limited to, tungsten boron silicon (WBxSiy), titanium silicon nitride (TiSixNy), tantalum silicon nitride (TaSixNy), silicon oxynitride (SiOxNy), and hafnium silicon oxide (HfSixOy). In one aspect, the composition of the ternary material layer may be tuned by changing the flow ratio of the second precursor to the third precursor between cycles.

Recombination at the interface between silicon and stoichiometric plasma silicon nitride

Abstract: The injection level dependence of the effective surface recombination velocity (Seff) for the interface between crystalline silicon and stoichiometric silicon nitride, prepared by high-frequency direct plasma enhanced chemical vapour deposition (PECVD), has been comprehensively studied. A wide variety of substrate resistivities for both n-type and p-type dopants have been investigated for minority carrier injection levels (Δn) between 1012 and 1017 cm−3. Effective lifetimes of 10 ms have been measured for high resistivity n-type and p-type silicon, the highest ever measured for silicon nitride passivated wafers, resulting in Seff values of 1 cm s−1 being unambiguously determined. The Seff(Δn) dependence is shown to be constant for n-type silicon under low injection conditions, while for p-type silicon, there is a clear minimum to Seff for injection levels close to the doping density. Further, the Seff(Δn) dependence for these stoichiometric silicon nitride films appears to be weaker than that for other high-quality, silicon-rich silicon nitride films prepared by remote PECVD.

Synthesis and characterization of silicon carbide, silicon oxynitride and silicon nitride nanowires

Abstract: Several methods have been employed to synthesize SiC nanowires. The methods include heating silica gel or fumed silica with activated carbon in a reducing atmosphere, the carbon particles being produced in situ in one of the methods. The simplest method to obtain β-SiC nanowires involves heating silica gel with activated carbon at 1360 °C in H2 or NH3. The same reaction, if carried out in the presence of catalytic iron particles, at 1200 °C gives α-Si3N4 nanowires and Si2N2O nanowires at 1100 °C. Another method to obtain Si3N4 nanowires is to heat multi-walled carbon nanotubes with silica gel at 1360 °C in an atmosphere of NH3. In the presence of catalytic Fe particles, this method yields α-Si3N4 nanowires in pure form.

SOI hybrid structure with selective epitaxial growth of silicon

Abstract: A method and structure for selectively growing epitaxial silicon in a trench formed within a silicon-on-insulator (SOI) structure. The SOI structure includes a buried oxide layer (BOX) on a bulk silicon substrate, and a silicon layer on the BOX. A pad layer is formed on the silicon layer. The pad layer includes a pad nitride (e.g., silicon nitride) on a pad oxide (e.g., silicon dioxide), and the pad oxide has been formed on the silicon layer. A trench is formed by anisotropically etching through the pad layer, the silicon layer, the BOX, and to a depth within the bulk silicon substrate. Insulative spacers are formed on sidewalls of the trench. An epitaxial silicon layer is grown in the trench from a bottom of the trench to above the pad layer. The pad layer and portions of the epitaxial layer are removed (e.g., by chemical mechanical polishing), resulting in a planarized top surface of the epitaxial layer that is about coplanar with a top surface of the silicon layer. Electronic devices may be formed within the epitaxial silicon of the trench. Such electronic devices may include dynamic random access memory (DRAM), bipolar transistors, Complementary Metal Oxide Semiconductor (CMOS) circuits which are sensitive to floating body effects, and devices requiring threshold voltage matching. Semiconductor devices (e.g., field effect transistors) may be coupled to the SOI structure outside the trench.

Coated article with anti-reflective layer(s) system

Abstract: Coated articles are provided with an anti-reflective (AR) layer(s) system which enables reduced reflection, increased visible transmission, and/or neutral color. In certain embodiments, the AR layer(s) system includes a silicon nitride layer(s), a silicon oxynitride layer, and/or a silicon oxide layer on the substrate over an infrared (IR) reflecting layer(s) such as silver. The AR system surprisingly enables improved visible transmission and/or reflection to be combined with more neutral color.

Deposition of silicon nitride

Abstract: Embodiments of the present invention relate to methods and apparatus for depositing a silicon nitride film. More particularly, embodiments of the present invention relate to methods and apparatus for depositing a silicon nitride film by cyclical layer deposition. One method for depositing a silicon nitride film generally comprises separately introducing one or more pulses of a nitrogen precursor and one or more pulses of a silicon precursor to a region adjacent to the substrate surface. A portion of the pulses of the nitrogen precursor and a portion of the pulses of the silicon precursor are present together at the region adjacent the substrate surface. Another embodiment for depositing a silicon nitride film comprises dosing a continuous flow of a purge gas with at least one pulse of a silicon precursor and at least one pulse of a nitrogen precursor. Each pulse of the silicon precursor and the nitrogen precursor is provided for a time period between about 0.01 seconds and about 2.0 seconds. A time period between the pulses of nitrogen precursor and the pulses of silicon precursor is between about 0.01 seconds and about 2.0 seconds. Still another embodiment for depositing a silicon nitride film comprises providing pulses of the silicon precursor and the nitrogen precursor to a substrate at a substrate temperature of about 600° C.

Silicon Oxynitride A Versatile Material for Integrated Optics Applications

Abstract: Silicon oxynitride is a very attractive material for integrated optics application, because of its excellent optical properties (~e.g. optical loss below 0.2 dB/cm!, the large refractive index range ~between 1.45 for silicon oxide and 2.0 for silicon nitride), and last but not least, the availability of reliable, low-cost fabrication technologies. Since good uniformity and reproducibility of the layers is extremely important for integrated optics applications, we have optimized the plasma-enhanced chemical vapor deposition and low-pressure chemical vapor deposition technologies of silicon oxynitride with respect to these requirements. Over a 50x50 mm area on a 3 inch wafer, an inhomogeneity of the refractive index of Dn<5E-3 and a nonuniformity of the layer thickness of < 1% can be obtained. Furthermore, new challenges such as the conditioning of the reactor, in order to guarantee process reproducibility in the same order of magnitude, are discussed. The high optical loss of silicon oxynitride in the third telecommunication window (wavelength range 1530-1605 nm), which is caused by the overtones of the Si-H and N-H bonds, was decreased by thermal treatment. Silicon oxynitride waveguides having a refractive index of 1.48 and an optical loss below 0.2 dB/cm (at 1550 nm) were realized.

Very low surface recombination velocities on p- and n-type silicon wafers passivated with hydrogenated amorphous silicon films

Abstract: Outstanding surface passivation of single-crystalline p- as well as n-type silicon is obtained using hydrogenated amorphous silicon (a-Si:H) films deposited at very low temperature in a plasma-enhanced chemical vapor deposition (PECVD) system. It is demonstrated that a-Si:H films with excellent surface passivation properties can be deposited in the temperature range between 200 and 250/spl deg/C. Despite the low deposition temperature, the surface passivation of low-resistivity (/spl sim/1 /spl Omega/cm) p-type silicon provided by the films exceeds that provided by high-temperature (/spl sim/1000/spl deg/C) thermal oxides and PECVD silicon nitride films deposited at temperatures around 400/spl deg/C. A record-low surface recombination velocity (SRV) of 3 cm/s is achieved on 1.6-/spl Omega/cm p-Si. In addition, on 3.4-/spl Omega/cm n-Si wafers, very low SRVs of 7 cm/s are obtained. Investigations regarding the thermal stability of the passivation quality of the a-Si:H films show that the passivation is stable for temperatures exceeding the deposition temperature.

Methods for forming openings in doped silicon dioxide

Abstract: Methods of forming openings in doped silicon dioxide layers and of forming self aligned contact holes are provided. The openings are generally etched in a plasma processing chamber. An etchant gas mixture comprising at least one fluorocarbon gas, at least one hydrogen containing gas, and at least one inert gas is used to strike a plasma. The plasma etches the opening in the doped oxide layer, and the etch is relatively highly selective of the doped oxide layer and relatively minimally selective of undoped oxide and silicon nitride layers. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that is will not be used to interpret or limit the scope or meaning of the claims. 37 CFR 1.72(b).

Thermal conductivity of germanium, silicon, and carbon nitrides

Abstract: We present a model calculation of the thermal conductivity of germanium nitride, silicon nitride, and carbon nitride in a temperature range in which intrinsic phonon scattering is dominant. We show that, in spite of the rather complex crystal structure of these nitrides, thermal conductivities exceeding 100 W m−1 K−1 can be attained in some of these compounds due to the combination of high Debye temperature and small Gruneisen constant.

Hexakis (monohydrocarbylamino) disilanes and method for the preparation thereof

Abstract: (Problems) - To provide silane compounds that are free of chlorine, that provide excellent film-forming characteristics at low temperatures in the case of silicon nitride films and silicon oxynitride films, and that also have excellent handling characteristics. Also, to provide a method for preparing these silane compounds. (Solution) - Hexakis (monohydrocarbylamino) dislanes with general formula (I) ((R) HN)3 - Si - Si - (NH (R))3 (I) wherein each R independently represents C1 to C4 hydrocarbyl. These disilanes can be synthesized by reacting hexachlorodisilane in organic solvent with at least 6-fold moles of the monohydrocarbylamine RNH2 (wherein R is C1 to C4 hydrocarbyl).

Heat treatment apparatus and cleaning method of the same

Abstract: A semiconductor water is contained in a reaction tube, and the reaction tube is exhausted through an exhaust pipe while supplying ammonia and dichlorosilane into the reaction tube. A silicon nitride film is deposited on an object to be heat-treated by a reaction of ammonia and dichlorosilane. Subsequently, TEOS is supplied into the reaction tube, while the reaction tube is exhausted through the exhaust pipe. A silicon oxide film is deposited on the object by resolving the TEOS. A semiconductor wafer an which a laminated layer of the silicon nitride film and the silicon oxide film is formed is unloaded from the reaction tube. Then, reactive products attached into the exhaust pipe and the reaction tube are removed, by conducting fluoride hydrogen thereinto, thereby cleaning the pipers The top end of the exhaust pipe is split into two vents, either one of which is used for discharging exhaust gas for forming films and the other one of which is used for discharging HF gas for cleaning the pipes.

Compressibility and thermal expansion of cubic silicon nitride

Abstract: The compressibility and thermal expansion of the cubic silicon nitride (c-Si3N4) phase have been investigated by performing in situ x-ray powder-diffraction measurements using synchrotron radiation, complemented with computer simulations by means of first-principles calculations. The bulk compressibility of the c-Si3N4 phase originates from the average of both Si-N tetrahedral and octahedral compressibilities where the octahedral polyhedra are less compressible than the tetrahedral ones. The origin of the unit cell expansion is revealed to be due to the increase of the octahedral Si-N and N-N bond lengths with temperature, while the lengths for the tetrahedral Si-N and N-N bonds remain almost unchanged in the temperature range 295-1075 K. (Less)

Single asperity tribochemical wear of silicon nitride studied by atomic force microscopy

Abstract: Nanometer scale single asperity tribochemical wear of silicon nitride was examined by measuring the wear of atomic force microscope tips translated against a variety of substrates in aqueous solutions. We show that the chemical nature of the substrate plays an important role: significant wear was observed only when the substrate surface is populated with appropriate metal-hydroxide bonds. Mica and calcite substrates, whose water-exposed cleavage surfaces lack these bonds, produced little if any tip wear. As a function of contact force FN and scan duration t, the length of the tips in this work decreases approximately as (FNt)0.5. We propose that pressure-induced intermediate states involving hydroxyl groups form on both the tip and the substrate; chemical reactions subsequently form transient bridging chemical bonds that are responsible for tip wear.

Remote Plasma-Enhanced Chemical Vapour Deposition of Silicon Nitride at Atmospheric Pressure

Abstract: Silicon nitride films were deposited using an atmospheric pressure plasma source. The discharge was produced by flowing nitrogen and helium through two perforated metal electrodes that were driven by 13.56 MHz radio frequency power. Deposition occurred by mixing the plasma effluent with silane and directing the flow onto a rotating silicon wafer heated to between 100°C and 500°C. Film growth rates ranged from 90±10 to 1300±130 A min-1. Varying the N2/SiH4 feed ratio from 55.0 to 5.5 caused the film stochiometry to shift from SiN1.45 to SiN1.2. Minimum impurity concentrations of 0.04% carbon, 3.6% oxygen and 13.6% hydrogen were achieved at 500°C, and an N2/SiH4 feed ratio of 22.0. The growth rate increased with increasing silane and nitrogen partial pressures, but was invariant with respect to substrate temperature and rotational speed. The deposition rate also decreased sharply with distance from the plasma. These results combined with emission spectra taken of the afterglow suggest that gas-phase reactions between nitrogen atoms and silane play an important role in this process.

Capped dual metal gate transistors for CMOS process and method for making the same

Abstract: A first gate ( 120 ) and a second gate ( 122 ) are preferably PMOS and NMOS transistors, respectively, formed in an n-type well ( 104 ) and a p-type well ( 106 ) In a preferred embodiment, first gate ( 120 ) includes a first metal layer ( 110 ) of titanium nitride on a gate dielectric ( 108 ), a second metal layer ( 114 ) of tantalum silicon nitride and a silicon containing layer ( 116 ) of polysilicon Second gate ( 122 ) includes second metal layer ( 114 ) of a tantalum silicon nitride layer on the gate dielectric ( 108 ) and a silicon containing layer ( 116 ) of polysilicon First spacers ( 124 ) are formed adjacent the sidewalls of the gates to protect the metals from chemistries used to remove photoresist masks during implant steps Since the chemistries used are selective to polysilicon, the spacers ( 124 ) need not protect the polysilicon capping layers, thereby increasing the process margin of the spacer etch process The polysilicon cap also facilitates silicidation of the gates

Fabrication of MEMS devices by using anhydrous HF gas-phase etching with alcoholic vapor

Abstract: In silicon surface micromachining, anhydrous HF GPE process was verified as a very effective method for the dry release of microstructures. The developed gas-phase etching (GPE) process with anhydrous hydrogen fluoride (HF) gas and alcoholic vapor such as methanol, isopropyl alcohol (IPA) was characterized and its selective etching properties were discussed. The structural layers are P-doped multi-stacked polysilicon and silicon-on-insulator (SOI) substrates and sacrificial layers are tetraethylorthosilicate (TEOS), low-temperature oxide (LTO), plasma enhanced chemical vapor deposition (PECVD) oxide, phosphosilicate glass (PSG) and thermal oxides on silicon nitride or polysilicon substrates. We successfully fabricated and characterized micro electro mechanical system (MEMS) devices with no virtually process-induced stiction and no residues. The characteristics of the MEMS devices for microsensor and microactuator, microfluidic elements and optical MEMS application were evaluated by experiment.