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Deren Yang

Researcher at Zhejiang University

Publications -  998
Citations -  26247

Deren Yang is an academic researcher from Zhejiang University. The author has contributed to research in topics: Silicon & Doping. The author has an hindex of 71, co-authored 944 publications receiving 22268 citations. Previous affiliations of Deren Yang include Zhejiang Sci-Tech University.

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Efficient and highly light stable planar perovskite solar cells with graphene quantum dots doped PCBM electron transport layer

TL;DR: In this paper, a successful case of graphene quantum dots (GQDs) doping into PCBM electron transport layer (ETL) of planar N-I-P PSCs, resulting in an obvious increase in PCBM conductivity together with enhanced charge extraction and reduced the trap state density of perovskite films.
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Recombination activity of Σ3 boundaries in boron-doped multicrystalline silicon: Influence of iron contamination

TL;DR: In this paper, the impact of the boundary plane and impurity contamination on the recombination activity of Σ3 boundaries in multicrystalline silicon (mc-Si) was studied by means of electron-beam-induced current (EBIC) technique.
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Epitaxial Growth of Multimetallic Pd@PtM (M = Ni, Rh, Ru) Core–Shell Nanoplates Realized by in Situ-Produced CO from Interfacial Catalytic Reactions

TL;DR: The Pd@PtNi nanoplates exhibit substantially improved activity and stability for methanol oxidation reaction (MOR) compared to the Pd-based multimetallic Nanoplates and commercial Pt catalysts due to the advantages arising from plate-like, core-shell, and alloy structures.
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Long Bi2S3 nanowires prepared by a simple hydrothermal method

TL;DR: In this article, a long Bi2S3 nanowires have been prepared via the thioglyolic acid (HSCH2COOH, TGA) assisted hydrothermal method.
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Interface engineering for efficient and stable chemical-doping-free graphene-on-silicon solar cells by introducing a graphene oxide interlayer

TL;DR: In this paper, a new structure of Gr-Si solar cells by introducing a graphene oxide (GO) interlayer to engineer the Gr−Si interface for improving device performance was reported.