scispace - formally typeset
J

Jinfeng Kang

Researcher at Peking University

Publications -  405
Citations -  9548

Jinfeng Kang is an academic researcher from Peking University. The author has contributed to research in topics: Resistive random-access memory & Neuromorphic engineering. The author has an hindex of 44, co-authored 377 publications receiving 7810 citations. Previous affiliations of Jinfeng Kang include National University of Singapore.

Papers
More filters
Journal ArticleDOI

Optoelectronic resistive random access memory for neuromorphic vision sensors.

TL;DR: A simple two-terminal optoelectronic resistive random access memory (ORRAM) synaptic devices for an efficient neuromorphic visual system that exhibit non-volatile optical resistive switching and light-tunable synaptic behaviours.
Journal ArticleDOI

A Low Energy Oxide‐Based Electronic Synaptic Device for Neuromorphic Visual Systems with Tolerance to Device Variation

TL;DR: The performance of an artificial visual system on the image orientation or edge detection with 16 348 oxide-based synaptic devices is simulated, successfully demonstrating a key feature of neuromorphic computing: tolerance to device variation.
Journal ArticleDOI

Recommended Methods to Study Resistive Switching Devices

TL;DR: This manuscript describes the most recommendable methodologies for the fabrication, characterization, and simulation of RS devices, as well as the proper methods to display the data obtained.
Journal ArticleDOI

Characteristics and mechanism of conduction/set process in TiN∕ZnO∕Pt resistance switching random-access memories

TL;DR: In this article, the characteristics and mechanism of conduction/set process in TiN∕ZnO∕Pt-based resistance random access memory devices with stable and reproducible nanosecond bipolar switching behavior were studied.
Journal ArticleDOI

HfOx-based vertical resistive switching random access memory suitable for bit-cost-effective three-dimensional cross-point architecture.

TL;DR: A bit- cost-effective technology path toward the 3D integration that requires only one critical lithography step or mask for reducing the bit-cost is demonstrated in this work.