Matra

About: Matra is a based out in . It is known for research contribution in the topics: Signal & Detector. The organization has 1330 authors who have published 1216 publications receiving 17967 citations.

Safety computations in integrated circuits

Abstract: In order to ensure the safety of software-based railway control systems, MATRA TRANSPORT has developed at the beginning of the eighties an "informational redundancy" technique associating arithmetic coding and signature checking, with the adequate environment interfaces (generally fail-safe devices). Compared to traditional redundancy, the "coded processor" has the advantage of a rigorous mathematical safety demonstration, independent of the reliability of the underlying hardware, but there is an important cost to pay in terms of execution speed. One of the (strongly) desired evolutions of our systems is to have a unique centralized wayside equipment, the immediate corollary being the decentralization of inputs/outputs. In order to reach this goal, a new generation has been designed, replacing the software code calculations and the discrete numeric components used in coded input acquisition/coded output command by ASICs. Our experience shows that it is possible to perform safe computations in an ASIC, and even that in some cases ASICs are more adaptable to the safety constraints than software computations.

Device for adjusting the backrest and legrest of a frame for a bed

Abstract: The central part (4) is firmly held in the inlay frame and with it a first pivot lever (9) is provided, which works in conjunction with the back rest part (2) and is pivotable around a first pivot axis (10). A second pivot lever (14) is provided, which works in conjunction with the thigh location part (3) and is pivotable around a second pivot axis (15), having at least one arm (20). The first axis (6), the second axis (7), the first pivot axis (10) and the second pivot axis (15) are arranged parallel to one another in the inlay frame (1). The pivot levers (9, 14) are pivotable by means of adjustment components.

Progress Towards the Development of a 10K Closed Cycle Cooler for Space Use

Abstract: A 10K cooler is being developed for space applications. It is a further extension of a Rutherford Appleton Laboratory (RAL) 20K cooler being space qualified at Matra Marconi Space Systems (MMS). New features include; optimised geometry, enhanced regenerators and a larger compressor system.

A Prototype VLSI Solution for Digital Terrestrial TV Receivers Conforming to the DVB-T Standard

Abstract: This paper intends to give a thorough overview of the technical activities carried out within the DVBird project (digital video broadcasting integrated receiver decoder), in the framework of the European Programme ACTS (Advanced Communications Technologies and Services), sponsored by the European Commission. The project results achieved in the design of the digital front-end stage of a receiver conforming to the new DVB-T European standard for over-the-air TV broadcasting are highlighted. This DVB-T standard is based on the COFDM (coded orthogonal frequency division multiplexing) technique and is the result of the technical efforts dedicated to the definition of a digital terrestrial television system in past years in Europe. An optimized channel decoder architecture, taking advantage of the most recent VLSI technologies in order to achieve a cost-effective solution for the receiver (or set-top box), is proposed. This work is carried out to encourage early introduction of a digital terrestrial television service in Europe, expected by the beginning of 1998, while the demonstrator is planned for extensive field trials in the second half of 1997. The fourchip prototype is based on state-of-the-art complementary metal oxide semiconductor (CMOS) 0.5-μm, 3.3-V 3-metal-layer very large scale integration (VLSI) technology. Moreover, a cooperative methodology has been implemented to validate the silicon and the demonstrator.

A radiation tolerant 0.6 /spl mu/m CMOS technology

Abstract: Modifications of the standard fabrication techniques of the 0.6 /spl mu/m CMOS technology lead to a radiation tolerant process in terms of immunity to total dose effects (up to 500 Gy) and to latchup under heavy ions (LET up to 100 MeV/(mg/cm/sup 2/)). In this paper, the process development and the evolution of device parameters as a function of total dose are presented.