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Journal ArticleDOI

Analysis and Design of Voltage-Controlled Oscillator Based Analog-to-Digital Converter

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TLDR
In this article, the performance of VCO-based ADCs in the presence of nonidealities such as jitter, nonlinearity, mismatch, and the metastability of D flip-flops is analyzed.
Abstract
A voltage-controlled oscillator (VCO) based analog-to-digital converter (ADC) is a time-based architecture with a first-order noise-shaping property, which can be implemented using a VCO and digital circuits. This paper analyzes the performance of VCO-based ADCs in the presence of nonidealities such as jitter, nonlinearity, mismatch, and the metastability of D flip-flops. Based on this analysis, design criteria for determining parameters for VCO-based ADCs are described. In addition, a digital calibration technique to enhance the spurious-free dynamic range degraded by the nonlinearity is also introduced. To verify the theoretical analysis, a prototype chip is implemented in a 0.13-?m CMOS process. With a 500-MHz sampling frequency, the prototype achieves a signal-to-noise ratio ranging from 71.8 to 21.3 dB for an input bandwidth of 100 kHz-247 MHz, while dissipating 12.6 mW and occupying an area of 0.078 mm2.

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Citations
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Journal ArticleDOI

A Low-Power Opamp-Less Second-Order Delta-Sigma Modulator for Bioelectrical Signals in 0.18 µm CMOS.

TL;DR: In this paper, a second-order delta-sigma modulator is proposed for low-noise, neural-action potential detection in the 300 Hz-6 kHz band, with an input-referred noise of 5.0 μVrms, and occupies an area of 0.0045 mm2.

Analysis and Modeling of Large-Scale Variation on DACs and SRAMs

TL;DR: This work presents simple and fast reliability estimation techniques for two of the most widely used systems: digital-to-analog converter (DAC) and SRAM and proposes two general models for the differential nonlinearity (DNL) and integral non linearity (INL) yield.
Proceedings ArticleDOI

Analog-to-digital converter using CML based Ring oscillator with tuning range 1–7.2 GHz in 90 nm CMOS

TL;DR: Analysis of the performance of VCO implemented by current mode logic based fully differential Ring oscillator for high speed and applications that require high noise immunity and analysis of limitation on maximum achievable oscillation frequency by CMOS inverter are proposed.
Journal ArticleDOI

Vco-based continuous-time sigma delta adc based on a dual-vco-quantizer-loop structure

TL;DR: A continuous time (CT) sigma delta (ΣΔ) analog-to-digital converter (ADC) based on a dual-voltage-controlled oscillator (VCO)-quantizer-loop structure with third-order filter is adopted to reduce quantization noise and VCO nonlinearity.
References
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Analog Integrated Circuit Design

TL;DR: In this paper, the authors present an overview of current mirror and Opamp design and compensation for single-stage Amplifiers and Current Mirrors, as well as a comparison of the two types of Opamps.
Journal ArticleDOI

All-digital TX frequency synthesizer and discrete-time receiver for Bluetooth radio in 130-nm CMOS

TL;DR: In this paper, the authors present a single-chip fully compliant Bluetooth radio fabricated in a digital 130-nm CMOS process, which is compatible with digital deep-submicron CMOS processes and can be readily integrated with a digital baseband and application processor.
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Principles of communications

TL;DR: In addition to stressing fundamental concepts, sections on currently important areas such as spread spectrum, cellular communications, and orthogonal frequency-division multiplexing are provided.
Journal ArticleDOI

A 12-Bit, 10-MHz Bandwidth, Continuous-Time $\Sigma\Delta$ ADC With a 5-Bit, 950-MS/s VCO-Based Quantizer

TL;DR: The use of VCO-based quantization within continuous-time (CT) SigmaDelta analog-to-digital converter (ADC) structures is explored, with a custom prototype in 0.13 mum CMOS showing measured performance of 86/72 dB SNR/SNDR with 10 MHz bandwidth.
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