Bonding constraints and defect formation at interfaces between crystalline
silicon and advanced single layer and composite gate dielectrics
G. Lucovsky
a)
Departments of Physics, Electrical and Computer Engineering, and Materials Science and Engineering,
North Carolina State University, Raleigh, North Carolina 27695-8202
Y. Wu
Department of Electrical and Computer Engineering, North Carolina State University, Raleigh,
North Carolina 27695-7911
H. Niimi
Department of Materials Science and Engineering, North Carolina State University, Raleigh,
North Carolina 27695-7907
V. Misra
Department Electrical and Computer Engineering, North Carolina State University, Raleigh,
North Carolina 27695-7911
J. C. Phillips
Lucent Bell Laboratories, Murray Hill, New Jersey 07974
~Received 14 December 1998; accepted for publication 3 February 1999!
An increasingly important issue in semiconductor device physics is understanding of how
departures from ideal bonding at silicon–dielectric interfaces generate electrically active defects that
limit performance and reliability. Building on previously established criteria for formation of low
defect density glasses, constraint theory is extended to crystalline silicon–dielectric interfaces that
go beyond Si–SiO
2
through development of a model that quantifies average bonding coordination
at these interfaces. This extension is validated by application to interfaces between Si and stacked
silicon oxide/nitride dielectrics demonstrating that as in bulk glasses and thin films, an average
coordination, N
av
, greater than three yields increasing defective interfaces. © 1999 American
Institute of Physics. @S0003-6951~99!00414-3#
As integrated circuits are aggressively scaled to increase
device packing, channel lengths in field effect transistors
~FETs! are projected to decrease to ;50 nm by 2012 with
the oxide-equivalent thickness (t
ox-eq
) for gate dielectrics de-
creasing proportionally to ,1 nm. For t
ox-eq
, 2.5 nm direct
tunneling in SiO
2
becomes important in off-state leakage.
Since tunneling increases exponentially with decreasing ox-
ide thickness, this necessitates introduction of alternative in-
sulators such as Si
3
N
4
, and Ta
2
O
5
with dielectric
constants.SiO
2
. These provide scaled-down values of t
ox-eq
required to maintain FET current drive, while reducing tun-
neling through increases in film thickness.
For oxides ,2.5 nm, interfacial defects such as Si dan-
gling bonds, can limit performance and reliability, making it
important to establish relationships between interface bond-
ing chemistry and defect properties. Experiments on stacked
silicon oxide/nitride dielectrics prepared by remote plasma-
enhanced chemical vapor deposition ~RPECVD! have pro-
vided insights into these issues. RPECVD, followed by rapid
thermal annealing ~RTA! at 900 °C in a nonoxidizing ambi-
ent has yielded device-quality nitrides for n- and p-channel
FETs with t
ox-eq
;2 nm.
1,2
Minimization of Si and N atom
dangling bonds in annealed bulk RPECVD nitrides derives
from low levels of bonded H, ;15 at. %.
3,4
Figure 1 displays current–voltage (I –V) curves for
p-channel FETs for different gate dielectrics with t
ox-eq
;2 nm: ~i! a 4 nm RPECVD nitride, ~ii! a 0.5 nm plasma
oxide with a 2.4 nm RPECVD nitride, and ~iii! a 1.5 nm
thermal oxide with a 1.0 nm RPECVD nitride. I –V traces
for ~ii! and ~iii! display excellent turn-on behavior and the
same current drive, with differences in threshold voltage de-
rived primarily from differences in substrate doping. In con-
trast, for the FET with the 4 nm nitride: ~i! threshold voltage
is shifted negative by .1V,~ii! turn-on is soft, and ~iii!
channel drive current is reduced by a factor of ;50. Figure 2
displays capacitance–voltage (C –V) characteristics for
p-type metal-oxide-semiconductor ~PMOS! devices with
t
ox-eq
;4.3 nm: one with a plasma oxide, and two with
stacked dielectrics with RPECVD nitride interface layers of
0.4 and 0.8 nm, respectively. Shifts in threshold ~and flat
band! voltage relative to Si–SiO
2
indicate increased fixed
charge for devices with nitride interfaces: Dq
f
5 C
ox
DV
th
~or
DV
fb
). Qualitatively similar results have been obtained for
n-type metal-oxide-semiconductor ~NMOS! devices with ni-
tride layer interfaces.
4
Three factors can play a role in promoting interfacial
defects: ~i! interfacial dipoles due to charge transfer between
the Si substrate and gate dielectric,
5
~ii! molar volume differ-
ences between the Si substrate and gate dielectric, and ~iii!
over-constrained bonding due to large values of average co-
ordination in the interfacial region.
6
Charge transfer is
smaller at nitride interfaces so that interfacial dipoles cannot
a!
Electronic mail: gerry
–
lucovsky@ncsu.edu
APPLIED PHYSICS LETTERS VOLUME 74, NUMBER 14 5 APRIL 1999
20050003-6951/99/74(14)/2005/3/$15.00 © 1999 American Institute of Physics
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play the determinant role in increased defect densities.
5
Since
the molar volume mismatch between Si
3
N
4
and Si is reduced
with respect to that of SiO
2
and Si, residual interface strain is
smaller and cannot be the origin of higher defect concentra-
tions at Si–Si
3
N
4
interfaces. The remainder of this letter fo-
cuses on interfacial bonding constraints.
The abruptness of Si–SiO
2
interfaces suggests that the
defect density of thermally grown oxides and optimally an-
nealed deposited oxides is a characteristic function of their
bonding chemistry and structure. Experience with good glass
formers such as SiO
2
and As
2
Se
3
has shown that as long as
only single bonds are present charge transfer plays a minor
part in determining structure. The major factor is the network
stress which arises for a given space-filling bonding topol-
ogy.
Constraint theory has provided a remarkably accurate
description of network stress and its consequences.
6,7
The
theory is based on the idea that all the bonding forces
~stretching, bending, etc.! in the network can be arranged in
a hierarchy from strong to weak. The constraining effects of
these forces are a linear function of the average coordination
number, N
av
. If both bond-bending and stretching forces are
present, the optimal average coordination number, N
av
*
,
which matches constraints to degrees of freedom is 2.4 as in
As
2
S~Se!
3
, however, for SiO
2
, N
av
*
5 2.67 is optimal because
bond-bending forces at O atoms are too weak to function as
significant constraints at growth or annealing temperatures.
8
For over-constrained networks such as Si
3
N
4
(N
av
5 3.43),
Si-atom stretching constraints are stronger than bending con-
straints, so that strain energy accumulates along the bending
constraints. The average Si–N–Si bond angle
u
ij
is distorted
from the ideal local value
u
ij
*
by an amount
d
u
}
d
N
av
*
5 N
av
2 N
av
*
. ~1!
Since total strain energy is proportional to (
d
u
)
2
,
9
it is then
anticipated that defect creation, e.g., dangling Si or N bonds,
will be proportional to
$
N
av
2 N
av
*
%
2
. Experiments have
shown that N
av
;3 represents a criterion between low defect
density (;10
16
cm
23
), and increasingly defective
materials.
10
Extension of constraint theory to Si-dielectric interfaces
considers three interfacial contributions to N
av
: ~i! the Si
substrate represented by one-half a Si atom, ~ii! an ultrathin
oxide or nitride interfacial layer ~0.3–0.6 nm!, and ~iii! the
bulk dielectric by one-half a molecular layer. Table I in-
cludes calculations of N
av
for representative Si-dielectric in-
terfaces. When a demarcation level N
av
;3 is applied, these
calculations are in excellent agreement with experiment ~see
Figs. 1 and 2!. The model confirms that Si–SiO
2
interfaces
are expected to display excellent interface properties (N
av
;2.8), whereas Si–Si
3
N
4
interfaces are not (N
av
;3.5).
Equally important, the calculations demonstrate that interpo-
sition of ultrathin SiO
2
layers between Si and Si
3
N
4
results in
values of N
av
<3, whereas interposition of ultra thin Si
3
N
4
layers between Si and SiO
2
results in N
av
. 3. Figure 3 is
based on the data of Figs. 1 and 2, and demonstrates that
defect scaling for bulk films, Eq. ~1!, also holds at interfaces.
Nitride layers have been produced by techniques other
than RPECVD. For example, films have been prepared by jet
vapor deposition ~JVD! yielding excellent electrical results.
13
However, nitride films produced in this way can have oxy-
gen concentrations as high as 15–18 at. %, and as such gate
stacks incorporating these films are expected to have signifi-
cant Si–SiO
2
bonding at the Si-dielectric interface. Without
more detailed characterizations of interfacial oxide concen-
trations in the JVD films, it is not possible to make direct
comparisons between the performance of these devices and
the quantitative aspects of constraint theory.
The model has also been applied to interfaces between
Si and ~i! silicon oxynitride alloys and ~ii! alternative high-K
FIG. 1. Drive current-gate voltage (I
d
2 V
g
) characteristics for PMOSFETs
with t
ox-eq
;2 nm: ~a! a 1.5 nm oxide separating a 1.0 nm nitride from the Si
substrate, ~b! a 0.6 nm oxide separating a 2.4 nm nitride from the Si sub-
strate, and ~c! a 4 nm nitride layer. The threshold voltage shift between ~a!
and ~b! is due in part to substrate doping differences ~0.16 V! and in part to
positive charge at the oxide–nitride interface ~0.04 eV!.
FIG. 2. C –V characteristics demonstrate shift in flat band voltage due to
positive charge, and increased separation between high frequency and qua-
sistatic plots due to interface trapping accompanying direct deposition of
thin nitride films onto Si. Each of these capacitors has t
ox-eq
;4.3 nm: ~i! a
reference oxide, and ~ii! two stacked NO structures with the nitride layer in
contact with the Si substrate. The nitride layer thickness is 0.4 nm for ~d!,
and 0.8 nm for ~e!.
2006 Appl. Phys. Lett., Vol. 74, No. 14, 5 April 1999 Lucovsky
et al.
Downloaded 22 Feb 2008 to 152.1.190.114. Redistribution subject to AIP license or copyright; see http://apl.aip.org/apl/copyright.jsp
dielectrics. For oxynitride alloys, Vogel et al.,
14
reported
only a small reduction in electron channel mobilities in an
alloy with about 2.3% nitrogen corresponding to N
av
;2.8.
While the criterion developed by the application of con-
straint theory predicts that the interfacial defect density
should not become appreciable until the alloy concentration
exceeds approximately 15–20 at. % N, interfacial defects in
n-channel FETs degrade channel mobilities by more than a
factor of two at a nitrogen concentration of only 11 at. %
corresponding to N
av
;3.0. This demonstrates that factors
other than interfacial bonding constraints can contribute in a
significant way to the formation of interfacial defects. How-
ever, it is important to note that for the oxynitride alloys of
Ref. 14, the experimentally determined defect levels are
higher than what is predicted by the application of constraint
theory, so that constraint theory may still provide a guideline
for estimating the minimum defect densities. The model cal-
culations for Ta
2
O
5
, TiO
2
, and Al
2
O
3
explain the necessity
for ultrathin SiO
2
layers between the Si substrate and these
high-K oxides. As such the model suggests important limita-
tions for gate dielectric interfaces other than Si–SiO
2
. Spe-
cifically: ~i! Si
3
N
4
cannot be directly substituted for SiO
2
at
Si substrates; and ~ii! substitution of more highly coordinated
high-K dielectrics such as Ta
2
O
5
, etc., will generally require
SiO
2
, or monolayer nitrided SiO
2
interfaces, thus establish-
ing a limitation on the extent to which t
ox-eq
can be reduced
below 1 nm. Finally, the bonding constraint model should be
taken as a guideline for anticipating differences in interface
quality that arise solely from differences in average bonding
coordination. As such it focuses on one important aspect of
interfacial bonding and structure. It is anticipated that as for
the oxynitride dielectrics of Ref. 12, additional aspects of
interface bonding and structure will also generate significant
concentrations of electrically active defects at other Si-
dielectric interfaces.
This research is supported by the NSF, ONR, SRC,
AFOSR, and SEMATECH.
1
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19, 106 ~1998!.
2
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3
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Technol. A 13, 607 ~1995!.
4
V. Misra, Z. Wang, H. Lazar, Y. Wu, H. Niimi, G. Lucovsky, J. J. Wort-
man, and J. R. Hauser ~unpublished!.
5
G. Lucovsky and H. Z. Massoud, J. Vac. Sci. Technol. B 16, 2191 ~1998!,
and references therein.
6
J. C. Phillips, J. Non-Cryst. Solids 34, 153 ~1979!; 47, 203 ~1983!.
7
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8
J. C. Phillips ~unpublished!.
9
J. H. Van der Merwe, J. Appl. Phys. 34, 123 ~1963!.
10
G. Lucovsky and J. C. Phillips, J. Non-Cryst. Solids 227, 1221 ~1998!.
11
F. L. Galeener, W. Stutius, and G. T. McKinley, in The Physics of MOS
Insulators, edited by G. Lucovsky, S. T. Pantelides, and F. L. Galeener
~Pergamon, New York, 1980!,p.77.
12
G. Lucovsky, A. Rozaj-Brvar, and R. F. Davis, in The Structure of Non-
Crystalline Materials 1982, edited by P. H. Gaskell, J. M. Parker, and E.
A. Davis ~Taylor and Francis, London, 1983!, p. 193.
13
T. P. Ma, IEEE Trans. Electron Devices 45, 680 ~1998!.
14
E. M. Vogel, W. L. Hill, V. Misra, P. K. McLarty, J. J. Wortman, J. R.
Hauser, P. Morfouli, G. Ghibaudo, and T. Ouisse, IEEE Trans. Electron
Devices 43, 753 ~1996!.
TABLE I. Average bonding coordination at Si-dielectric interfaces.
Material system Average coordination (N
av
) Electrical quality
Si–SiO
2
~1.5 molecular layers! 2.8 excellent, thermal oxides
Si–Si
3
N
4
~1.5 molecular layers! 3.5 very poor @Ref. 4#
Si–$SiO
2
%(t)–Si
3
N
4
t50.6 nm: 3.0
very good @Fig. 1#
t5 oxide layer thickness
t5 1.5 nm: 2.9
excellent @Fig. 1#
Si–$Si
3
N
4
%(t)–SiO
2
t5 0.4 nm: 3.3
d
poor @Fig. 2#
t5 oxide layer thickness
t5 0.8 nm: 3.4
poor @Fig. 2#
Si–N–SiO
2
$1 monolayer ~ML!% 2.8 excellent @Ref. 5#
Si–~SiO
2
!
0.977
$Si
3
N
4
!
0.023
2.3 at. % N: 2.8 excellent @Ref. 14#
Si–~SiO
2
!
0.89
$Si
3
N
4
!
0.11
11 at. % N: 3.0 poor @Ref. 14#
Si–TiO
2
%
a
~1.5 molecular layers! 4.0 unreported
Si–Ta
2
O
5
%
b
~1.5 molecular layers! 3.5 unreported
Si–Al
2
O
3
%
c
~1.5 molecular layers! 3.6 unreported
a
Average coordination
@
Ti
#
5 6,
@
O
#
5 3.0 @rutile/anatase bonding#.
b
Average coordination:
@
Ta
#
5 6,
@
O
#
5 2.4 @Ref. 11#.
c
Average coordination: Al5
@
4.5
#
,
@
O
#
5 3.0 @3:1 ratio of tetrahedral to octahedral sites, see Ref. 12#.
d
Sample calculation of N
av
for Si–$Si
3
N
4
%(t)–SiO
2
: t5 0.4. Substrate: 1/2 atomic layer: 0.5 atoms, 2 bonds.
Interface layer: 1 molecular layer: 7 atoms (Si
3
N
4
), 24 bonds. Dielectric film: 1/2 molecular layer: 1.5 atoms
(SiO
2
), 4 bonds. 30 bonds/9 atoms5 N
av
5 3.3 bonds/atom.
FIG. 3. Plot of normalized defect density as a function of
$
N
av
2 N
av
*
%
2
. Data
points a, b, and c are from Fig. 1, and d and e from Fig. 2.
2007Appl. Phys. Lett., Vol. 74, No. 14, 5 April 1999 Lucovsky
et al.
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