Patent
Nanoscale wires and related devices
Charles M. Lieber,Xiangfeng Duan,Yi Cui,Yu Huang,Mark S. Gudiksen,Lincoln J. Lauhon,Jiangfang Wang,Hongkun Park,Qingqiao Wei,Wenjie Liang,David C. Smith,Deli Wang,Zhaohui Zhong +12 more
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TLDR
In this paper, the fabrication and growth of sub-microelectronic circuitry is described, and the arrangement of such articles to fabricate electronic, optoelectronic, or spintronic devices and components.Citations
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Patent
Method for Making a Semiconductor Device Having a Semiconductor-on-Insulator (SOI) Configuration and Including a Superlattice on a Thin Semiconductor Layer
TL;DR: In this article, a method for making a semiconductor device may include forming an insulating layer on a substrate, and forming a semiconducting layer on the substrate on a side thereof opposite the substrate.
Patent
Method for making a semiconductor device including a superlattice and adjacent semiconductor layer with doped regions defining a semiconductor junction
TL;DR: In this article, a method for making a semiconductor device may include forming a superlattice comprising a plurality of stacked groups of layers and an energy band-modifying layer thereon.
Patent
Thermal management and method for large scale processing of cis and/or cigs based thin films overlying glass substrates
TL;DR: In this article, a thermal management and method for large scale processing of CIS and/or CIGS-based thin film overlaying glass substrates is presented, which includes providing a plurality of substrates, each of the substrates having a copper and indium composite structure.
Patent
Mechanical deformation amount sensor
TL;DR: In this paper, a deformation amount sensor includes a sensor structure (1) which is formed by a semiconductor substrate or an insulating substrate and integrally includes a deformable deformation portion (2) deformable when a physical quantity to be detected is applied to the sensor structure.
Patent
Semiconductor device including a superlattice and replacement metal gate structure and related methods
TL;DR: In this article, a superlattice channel is defined for a semiconductor device with a substrate having a channel recess, a plurality of spaced apart shallow trench isolation (STI) regions, and source and drain regions spaced apart in the substrate and between a pair of the STI regions.
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Journal ArticleDOI
Room-temperature ultraviolet nanowire nanolasers
Michael H. Huang,Samuel S. Mao,Henning Feick,Haoquan Yan,Yiying Wu,Hannes Kind,Eicke R. Weber,Richard E. Russo,Peidong Yang,Peidong Yang +9 more
TL;DR: Room-temperature ultraviolet lasing in semiconductor nanowire arrays has been demonstrated and self-organized, <0001> oriented zinc oxide nanowires grown on sapphire substrates were synthesized with a simple vapor transport and condensation process.
Journal ArticleDOI
Nanotube molecular wires as chemical sensors
Jing Kong,Nathan R. Franklin,Chongwu Zhou,Michael Chapline,Shu Peng,Kyeongjae Cho,Hongjie Dai +6 more
TL;DR: The nanotubes sensors exhibit a fast response and a substantially higher sensitivity than that of existing solid-state sensors at room temperature and the mechanisms of molecular sensing with nanotube molecular wires are investigated.
Journal ArticleDOI
Nanowire Nanosensors for Highly Sensitive and Selective Detection of Biological and Chemical Species
TL;DR: The small size and capability of these semiconductor nanowires for sensitive, label-free, real-time detection of a wide range of chemical and biological species could be exploited in array-based screening and in vivo diagnostics.
Journal ArticleDOI
Indium phosphide nanowires as building blocks for nanoscale electronic and optoelectronic devices
TL;DR: The assembly of functional nanoscale devices from indium phosphide nanowires, the electrical properties of which are controlled by selective doping are reported, and electric-field-directed assembly can be used to create highly integrated device arrays from nanowire building blocks.