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Journal ArticleDOI

Trap creation in silicon dioxide produced by hot electrons

D. J. DiMaria, +1 more
- 15 Mar 1989 - 
- Vol. 65, Iss: 6, pp 2342-2356
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TLDR
In this article, the authors show that trap creation in both the bulk of silicon dioxide films and at its interfaces with silicon and metallic contacting electrodes is dependent on the presence of hot electrons in the oxide.
Abstract
Trap creation in both the bulk of silicon dioxide films and at its interfaces with silicon and metallic contacting electrodes is shown to depend on the presence of hot electrons in the oxide. For thick oxides (≥100 A), little trap creation is observed in the near‐thermal transport regime at electric field magnitudes less than 1.5 MV/cm. At these low fields, electrons travel in a streaming fashion close to the bottom of the oxide conduction band at energies less than that of the dominant optical phonon mode at 0.153 eV. At higher electric fields, the rate of bulk trap creation is proportional to the average energy of the hot electrons, which move in a dispersive manner and can reach energies as large as 4 eV. For thin oxides (<100 A) where electrons can travel ballistically (i.e., without scattering), traps are not produced unless injected electrons acquire more than 2 eV of kinetic energy from the applied electric field, regardless of the magnitude of this field. All data on both thin and thick oxides are shown to give a threshold for trap creation of about 2.3 eV by the hot electrons in the oxide conduction band. Also, trap creation is shown to be suppressed by lowering the lattice temperature below ≊150 K. Our results are discussed in terms of a model involving hydrogen‐related‐species release from defect sites near the anode by the hot electrons and the subsequent motion of these molecules to regions near the cathode where they can interact with the lattice and form the trapping sites which are measured.

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Citations
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CMOS scaling into the nanometer regime

TL;DR: In this article, the key challenges in further scaling of CMOS technology into the nanometer (sub-100 nm) regime in light of fundamental physical effects and practical considerations are discussed, including power supply and threshold voltage, short-channel effect, gate oxide, high-field effects, dopant number fluctuations and interconnect delays.
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Ultrathin (<4 nm) SiO2 and Si-O-N gate dielectric layers for silicon microelectronics: Understanding the processing, structure, and physical and electrical limits

TL;DR: In this paper, the authors summarized recent progress and current scientific understanding of ultrathin (<4 nm) SiO2 and Si-O-N (silicon oxynitride) gate dielectrics on Si-based devices.
Journal ArticleDOI

Impact ionization, trap creation, degradation, and breakdown in silicon dioxide films on silicon

TL;DR: In this article, two mechanisms triggered by electron heating in the oxide conduction band are discussed: trap creation and band gap ionization by carriers with energies exceeding 2 and 9 eV, respectively.
Journal ArticleDOI

Mechanism for stress-induced leakage currents in thin silicon dioxide films

TL;DR: In this paper, it was concluded that the generation of neutral electron traps in thin oxides is the dominant cause of leakage currents introduced in the low-field, direct-tunneling regime of thin oxide during high-field stress.
Journal ArticleDOI

Underlying physics of the thermochemical e model in describing low-field time-dependent dielectric breakdown in sio2 thin films

TL;DR: In this paper, the underlying physics behind the success of the thermochemical E model in describing time-dependent dielectric breakdown (TDDB) in SiO2 thin films is presented.
References
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Book

CRC Handbook of Chemistry and Physics

TL;DR: CRC handbook of chemistry and physics, CRC Handbook of Chemistry and Physics, CRC handbook as discussed by the authors, CRC Handbook for Chemistry and Physiology, CRC Handbook for Physics,
Proceedings Article

Physics of semiconductor devices

S. M. Sze
Book

Mos (Metal Oxide Semiconductor) Physics and Technology

TL;DR: In this article, the authors present a method for extracting interface trap properties from the conductance of a metal oxide Silicon Capacitor at intermediate and high frequency intervals, and demonstrate that these properties can be used for charge trapping in the oxide.

MOS /metal oxide semiconductor/ physics and technology

TL;DR: In this article, the authors present a method for extracting interface trap properties from the conductance of a metal oxide Silicon Capacitor at intermediate and high frequency intervals, and demonstrate that these properties can be used for charge trapping in the oxide.
Journal ArticleDOI

Hole traps and trivalent silicon centers in metal/oxide/silicon devices

TL;DR: In this paper, electron spin resonance (ESR) measurements of E′ center (a "trivalent silicon" center in SiO2) density as well as capacitance versus voltage (C•V) measurements on γ-irradiated metal/oxide/silicon (MOS) structures were reported.
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