Showing papers on "Relaxation oscillator published in 2013"

A 63,000 Q-factor relaxation oscillator with switched-capacitor integrated error feedback

Abstract: There is a growing interest in implementing on-chip reference clock generators for low-cost low-power area-efficient SoCs, such as implantable biomedical devices and microcomputers. Relaxation oscillators are suitable candidates to generate such reference clocks due to their compact size, low power consumption and wide frequency tuning range. However, the poor phase noise performance and large long-term variation are two major problems that limit their application.

A Submicrowatt 1.1-MHz CMOS Relaxation Oscillator With Temperature Compensation

Abstract: A 1.1-MHz submicrowatt current-mode relaxation oscillator with temperature compensation is presented. In this oscillator, the current-starving inverters are biased by using the current sources with positive and negative temperature coefficients. It relaxes the temperature variations. This oscillator is fabricated in a 0.18- μm CMOS process, and its area is 0.075 mm2. The power consumption is 0.859 μW, with a supply voltage of 1.8 V, and the calculated figure of merit is 0.78 nW/kHz. The measured output relative frequency variation is less than 3%/V for the supply voltage of 1.2-2.4 V and ±0.5% for the temperature of -20°C-80°C. The average temperature coefficient is 64.3 ppm/°C.

Generalized Analysis of Symmetric and Asymmetric Memristive Two-Gate Relaxation Oscillators

Abstract: Memristive oscillators are a novel topic in nonlinear circuit theory, where the behavior of the reactive elements is emulated by the memristor. This paper presents symmetric and asymmetric memristive two-gate relaxation oscillators. First, the analysis of the two series memristors is introduced to study the effect of changing their polarities, as well as the mobility factor to be used in the two-gate relaxation oscillator instead of the RC circuit. The generalized analysis for the proposed memristive two-gate oscillator is introduced, where the generalized expressions for the oscillation frequency and conditions for oscillation are derived then four special cases for different mismatching of the memristors are introduced; showing a perfect matching with the PSPICE simulations. Finally, the discussion and comparison are proposed to discuss the four special cases and MATLAB simulations are also provided to study the effect of the memristance and the mobility ratio between the memristors on the oscillation frequency.

Relaxation Oscillator-Based Active Bridge Circuit for Linearly Converting Resistance to Frequency of Resistive Sensor

Abstract: An easily implementable signal conditioning circuit for resistive humidity and temperature sensors is presented. It is based on a relaxation oscillator in which both the frequency and the duty-cycle of the square-wave output signal simultaneously carry information from two different types of sensors. The output frequency is linearly related to the resistive unbalance of an active bridge, whereas the duty-cycle is independently controlled by a thermal sensor for controlling temperature error of the humidity sensor (RH). The design, analysis, and experimental characterization of the circuit and its application to a sol-gel thin film porous γ-Al2O3-based humidity sensor and resistance temperature detector are reported. Experimental results confirm the theoretical value predicted. The circuit covering wide resistance measurement range has the potential for remotely monitoring measurement parameters accurately.

A Digital Frequency-Locked Loop System for Capacitance Measurement

Abstract: Similar to phase-locked loops, frequency-locked loops (FLLs) are useful in many applications involving waveform synchronization or synthesis. Simple logic circuit-based relaxation oscillators convert capacitance to frequency, which is a characteristic inverse relationship between output frequency and input capacitance. The oscillator's logic level square-wave output can be fed into an all-digital FLL that will frequency lock to the input signal and produce a digital output word N, where N is inversely proportional to the input frequency. The result is that N is linearly proportional to the unknown capacitance in the oscillator. This novel approach allows a simple FFL implementation for capacitance measurement and is demonstrated in hardware using a capacitive sensor that measures the mass of small quantities of water with an output capacitance range of 75-185 pF.

Virtual Oscillator Control for voltage source inverters

Abstract: This paper summarizes a suite of methods that have recently been proposed for the control and synchronization of parallel single- and three-phase voltage source power electronics inverters. Inspired by the phenomenon of synchronization in networks of coupled oscillators, the premise of the proposed Virtual Oscillator Control (VOC) is to control an inverter such that it mimics the dynamics of a nonlinear oscillator. Consequently, the inverters synchronize their voltage outputs and share the load power in proportion to their power ratings without any communication. The VOC design philosophy and sufficient conditions for global asymptotic synchronization are outlined. Simulations validate the analytical results for a parallel system of three-phase inverters serving a constant-power load.

Dynamics of mobile coupled phase oscillators

Abstract: We study the transient synchronization dynamics of locally coupled phase oscillators moving on a one-dimensional lattice. Analysis of spatial phase correlation shows that mobility speeds up relaxation of spatial modes and leads to faster synchronization. We show that when mobility becomes sufficiently high, it does not allow spatial modes to form and the population of oscillators behaves like a mean-field system. Estimating the relaxation timescale of the longest spatial mode and comparing it with systems with long-range coupling, we reveal how mobility effectively extends the interaction range.

A 32.55-kHz, 472-nW, 120ppm/°C, fully on-chip, variation tolerant CMOS relaxation oscillator for a real-time clock application

Abstract: This paper proposes an ultra-low power fully on-chip CMOS relaxation oscillator (ROSC) for a real-time clock application. The circuit has a distinctive feature in compensation architecture of a comparator's non-idealities caused by offset voltage and delay time. The ROSC can generate a stable and higher oscillation clock frequency without increasing power by using a low reference voltage and employing a novel compensation architecture for comparators. Measurement results in a 0.18-μm CMOS process demonstrated that the circuit can generate a stable clock frequency of 32.55 kHz. The power dissipation was 472 nW. Measured line regulation and temperature coefficient were 1.1%/V and 120ppm/°C, respectively.

A 0.007- ${\rm mm}^{2}$ 108- ${\rm ppm}/^{\circ } {\rm C}$ 1-MHz Relaxation Oscillator for High-Temperature Applications up to 180 $^{\circ } {\rm C}$ in 0.13- $\mu {\rm m}$ CMOS

Abstract: Reliable high-temperature CMOS oscillators are required for clock or time-base generation in several applications including data acquisition for aerospace, automotive control, oil field instrumentation, and pulp and paper digesters. In this paper, we present low-complexity resistive and capacitive temperature-compensation techniques for CMOS relaxation oscillators. In such oscillators, the frequency of oscillation is a function of a resistor-capacitor product. The resistive compensation technique employs a recently proposed monolithic resistor with a given temperature coefficient (TC) that uses contacts to adjust the TC of the resistor. The capacitive compensation technique is based on using a varactor to adjust the value of the timing capacitance over temperature to compensate for the high-temperature junction leakage current and to keep the oscillation frequency relatively constant. A prototype oscillator based on the proposed techniques is implemented in a standard 0.13-μm CMOS process and reliably operates over 25 to 180 °C. Measured results show that over the temperature range of interest the compensated oscillator achieves a temperature coefficient of 108 ppm/°C. The oscillator along with its output drivers occupies 7200 μm2 (2.3 × to 114 × smaller than state-of-the-art designs) and consumes 428 μW from a 2.5 V supply. For supply variations between 2 and 3 V, the frequency variation is ±1.09%/V.

On the stability analysis of a pair of van der Pol oscillators with delayed self-connection, position and velocity couplings

Abstract: In this paper, we perform a stability analysis of a pair of van der Pol oscillators with delayed self-connection, position and velocity couplings. Bifurcation diagram of the damping, position and velocity coupling strengths is constructed, which gives insight into how stability boundary curves come into existence and how these curves evolve from small closed loops into open-ended curves. The van der Pol oscillator has been considered by many researchers as the nodes for various networks. It is inherently unstable at the zero equilibrium. Stability control of a network is always an important problem. Currently, the stabilization of the zero equilibrium of a pair of van der Pol oscillators can be achieved only for small damping strength by using delayed velocity coupling. An interesting question arises naturally: can the zero equilibrium be stabilized for an arbitrarily large value of the damping strength? We prove that it can be. In addition, a simple condition is given on how to choose the feedback parameters to achieve such goal. We further investigate how the in-phase mode or the out-of-phase mode of a periodic solution is related to the stability boundary curve that it emerges from a Hopf bifurcation. Analytical expression of a periodic solution is derived using an integration method. Some illustrative examples show that the theoretical prediction and numerical simulation are in good agreement.

Synchronization of electrochemical oscillators with differential coupling.

Abstract: Experiments are presented to describe the effect of capacitive coupling of two electrochemical oscillators during Ni dissolution in sulfuric acid solution. Equivalent circuit analysis shows that the coupling between the oscillators occurs through the difference between the differentials of the electrode potentials. The differential nature of the coupling introduces strong negative nonisochronicity (i.e., phase shear, strong dependence of the period on the amplitude) in the coupling mechanism with smooth oscillators (under conditions just above a Hopf bifurcation point). Because of the negative nonisochronicity, asymmetrically coupled oscillators exhibit anomalous phase synchronization in the form of frequency difference enhancement. At strong coupling bistability is observed between in-phase and antiphase synchronized states. With relaxation oscillators, in contrast to the resistive coupling where antiphase synchronization can occur, the typical system response with weak coupling is out-of-phase synchronization. When the capacitance is applied on the individual resistors attached to the electrodes the oscillators exhibit weak positive nonisochronicity; this is in contrast with the strong negative nonisochronicity obtained with cross coupling. The proposed coupling configurations reveal the importance of the nonisochronicity level of oscillations for the experimentally observed synchronization patterns and also provide efficient ways of tuning the nonisochronicity level of the oscillations. This latter feature can be exploited to design synchronization features with a combination of resistive (difference) and capacitive (differential) coupling.

A $\pm$ 0.5% Precision On-Chip Frequency Reference With Programmable Switch Array for Crystal-Less Applications

Abstract: An on-chip frequency reference is designed for low-power, low-cost, and fully integrated system-on-chip designs. In this relaxation oscillator, pseudodifferential architecture is used to eliminate frequency variation caused by bias current, and interleaving capacitors are implemented to extend its discharge time. A low-leakage programmable switch array (PSA) trimming method is proposed to calibrate the first- and second-order temperature coefficients (TCs) of the composite resistor. The oscillator was fabricated in a 0.35-μm 2P4M CMOS process with an area of 0.162 mm2. The oscillator operates at 130 kHz, and measurement results show that it achieves a frequency variation of less than ±0.5% over a temperature range of -20 °C-100°C and less than ±0.4% over a supply voltage range of 1-3 V.

Enhanced entrainability of genetic oscillators by period mismatch

Abstract: Biological oscillators coordinate individual cellular components so that they function coherently and collectively. They are typically composed of multiple feedback loops, and period mismatch is unavoidable in biological implementations. We investigated the advantageous effect of this period mismatch in terms of a synchronization response to external stimuli. Specifically, we considered two fundamental models of genetic circuits: smooth and relaxation oscillators. Using phase reduction and Floquet multipliers, we numerically analysed their entrainability under different coupling strengths and period ratios. We found that a period mismatch induces better entrainment in both types of oscillator; the enhancement occurs in the vicinity of the bifurcation on their limit cycles. In the smooth oscillator, the optimal period ratio for the enhancement coincides with the experimentally observed ratio, which suggests biological exploitation of the period mismatch. Although the origin of multiple feedback loops is often explained as a passive mechanism to ensure robustness against perturbation, we study the active benefits of the period mismatch, which include increasing the efficiency of the genetic oscillators. Our findings show a qualitatively different perspective for both the inherent advantages of multiple loops and their essentiality.

Voltage Mode Pulse Width Modulator Using Single Operational Transresistance Amplifier

Abstract: This paper presents a voltage mode pulse width modulator (PWM) using single operational transresistance amplifier (OTRA). The proposed PWM consists of a relaxation oscillator output which is modulated using modulating signal. PSPICE simulation results and experimental results have been included to verify the theoretical analysis.

Three-axial force sensor with capacitive read-out using a differential relaxation oscillator

Abstract: A silicon three-axis force sensor is designed and realized to be used for measurement of the interaction force between a human finger and the environment. To detect the force components, a capacitive read-out system using a novel relaxation oscillator has been developed with an output frequency proportional to differential capacitance. The sensor has a range of 2N in tangential- and normal force direction with an accuracy better than 1.5% of the full-scale. The sensor can be safely overloaded with a normal force of more than 30N.

Barkhausen criterion and another necessary condition for steady state oscillations existence

Abstract: Recent times have given rise to interesting discussions about the necessary and sufficient criteria for steady state oscillations of electronic circuits. The aim of this paper is to point out that the Barkhausen criterion (Bc), while a necessary condition for oscillations, but not a sufficient one, could be supplemented with another necessary condition. Here, we would like to take account of a feature of phase vs. frequency characteristics of linear feedback networks for oscillators. We analyze Twin-T (DT) oscillator and modified Wien (MW) oscillator according to [6], [7], from the point of linear circuit theory by means of open loop characteristic equations and root-locus diagrams for some parameters values where derivatives of the phase vs. frequency open loop feedback systems can be positive or negative, (in the vicinity of the frequencies where the Bc is fulfilled). Characteristic equations of both oscillators and their root-locus diagrams as a function of gain of ideal linear amplifier (AMP) are compared and estimated. For nonlinear amplifier, nonlinear ordinary differential equations have been solved and compared with the assistance of MATLAB, MathCAD and MICRO-CAP (MC10). In addition, we present experimental investigation of the impact of phase vs. frequency characteristic properties on steady state oscillation existence in feedback oscillators in other article as well [15]. All obtained results have confirmed that feedback systems with positive derivatives of phase vs. frequency characteristics (in the vicinity of frequencies where Bc is fulfilled) are incapable of producing steady state oscillations. So we can say that the requirement for negative derivatives of phase vs. frequency characteristic of the feedback network could be understood as a necessary condition for oscillations existence. It is a novel look at the role of this characteristic for steady state oscillations existence.

A 2-MHZ, process and voltage compensated clock oscillator for biomedical implantable SoC in 0.18-μm CMOS

Abstract: We present the design and performance of a power and area efficient, process and voltage compensated, 2-MHz clock oscillator for state-of-the art wireless biomedical implantable systems-on-chip. The design presented in this paper is based on a fully differential three-stage ring oscillator with replica feedback bias, a novel process detection circuit, and a novel differential comparator to save power and area. The design of the comparator ensures the rail-to-rail swing and further improves power-supply-rejection-ratio (PSRR). The process corner sensing scheme is based on the leakage current of the device which generates control voltage for the replica feedback bias circuit. A total of 66 chip samples were collected from various locations on multiple full wafers and average variation of ±2.81% with process corner was measured at room temperature. The variation in clock frequency with supply was 0.11% for the voltage range of 1.9V-3V. The design of oscillator is intended for the RF powering scheme and it occupies 0.018 μm2 in 0.18-μm CMOS. The clock oscillator consumes 12μW from a 1.8 V regulated supply.

Temperature sensor and temperature measurement method thereof

Abstract: A temperature sensor that senses a temperature on the basis of a relaxation oscillator, includes: a bias circuit unit that outputs a bias current increasing with an increase in temperature; a capacitor voltage unit that charges a capacitor with the bias current and discharges the current when receiving a control signal; a pulse generating unit that outputs a pulse when the voltage of the capacitor is higher than a reference voltage, changes the pulse width of the pulse, and transmits the pulse corresponding to the control signal to the capacitor voltage unit; and a counter unit that counts and outputs, as a digital value, the number of pulses outputted from the pulse generating unit, on the basis of a reference frequency.

Entrainment of noise-induced and limit cycle oscillators under weak noise

Abstract: Theoretical models that describe oscillations in biological systems are often either a limit cycle oscillator, where the deterministic nonlinear dynamics gives sustained periodic oscillations, or a noise-induced oscillator, where a fixed point is linearly stable with complex eigenvalues, and addition of noise gives oscillations around the fixed point with fluctuating amplitude. We investigate how each class of models behaves under the external periodic forcing, taking the well-studied van der Pol equation as an example. We find that when the forcing is additive, the noise-induced oscillator can show only one-to-one entrainment to the external frequency, in contrast to the limit cycle oscillator which is known to entrain to any ratio. When the external forcing is multiplicative, on the other hand, the noise-induced oscillator can show entrainment to a few ratios other than one-to-one, while the limit cycle oscillator shows entrain to any ratio. The noise blurs the entrainment in general, but clear entrainment regions for limit cycles can be identified as long as the noise is not too strong.

Frequency-Domain Study of Lock Range of Non-Harmonic Oscillators With Multiple Multi-Tone Injections

Abstract: This paper presents a frequency-domain study of the lock range of non-harmonic oscillators with multiple multi-tone injections. By representing non-harmonic oscillators with a set of harmonic oscillators, the intrinsic relation between the lock range of harmonic oscillators and that of non-harmonic oscillators is obtained. We show non-harmonic oscillators with a multi-tone injection exhibit a larger lock range as compared with that with a single-tone injection. We further show non-harmonic oscillators with multiple single-tone injections exhibit a larger lock range as compared with that with a single single-tone injection. The condition upon which non-harmonic oscillators with multiple single-tone injections exhibit a larger lock range as compared with those with a single-tone injection is derived. The condition upon which non-harmonic oscillators with multiple multi-tone injections exhibit a larger lock range as compared with those with a single multi-tone injection is also derived. The theoretical findings are verified using a dual-comparator relaxation oscillator designed in an IBM 130 nm 1.2 V CMOS technology and analyzed using Spectre from Cadence Design Systems with BSIM4 device models.

Analysis of Oscillators for the Generation of Rhythmic Patterns in Legged Robot Locomotion

Abstract: This paper presents a study of several oscillators for the generation of rhythmic patterns that are used in the locomotion of legged robots using a central pattern generator (CPG). This work also shows a comparative analysis of these oscillators focused on their implementation as part of the CPG system, based on simulations made using software tools. Three models were implemented and simulated: the Hopf model as an example of a harmonic oscillator, a reflexive oscillator using the Van der Pol oscillator, and the ACPO (amplitude coupled phase oscillator) corresponding to the phase oscillators category. It is established that a phase oscillator is the best choice when working with CPGs offering a simple yet versatile way to connect the limbs.

Relaxation oscillator for increasing frequency-control current linearity

Abstract: The invention discloses a relaxation oscillator for increasing frequency-control current linearity. The relaxation oscillator comprises a charge and discharge circuit, a control circuit and a floating charge and discharge capacitor arranged between the charge and discharge circuit and the control circuit. The control circuit detects voltage of the floating charge and discharge capacitor and outputs a control signal. The output signal of the oscillator is determined by only the charge process of the floating charge and discharge capacitor, so that complete-period delay of the oscillator is decreased and frequency-control current linearity of the oscillator is increased. The floating charge and discharge capacitor is formed by parallelly connecting two equal capacitors C1 and C2, and two pole plates of the capacitors C1 and C2 are cross-connected with each other; two ends of the floating charge and discharge capacitor are symmetrical, so that the influence of micro stray capacitance at two ends of the floating charge and discharge capacitor upon the output of the oscillator is decreased.

Accuracy analysis of oscillator-based active bridge circuit for linearly converting resistance to frequency

Abstract: Based on active bridge followed by a relaxation oscillator, a resistance to frequency convertor circuit proposed by the authors is critically analyzed in non-ideal conditions. Due to the behavior of real components there is a deviation from idealities. The main sources of error can be considered and analyzed by carrying out first order analysis. Each source of error is treated as separate from the other one which helps to neglect any possible correlation. For minimization of main error a compensating method is illustrated, and results on its experimental validation are reported.

A 20μW 10MHz relaxation oscillator with adaptive bias and fast self-calibration in 40nm CMOS for micro-aerial robotics application

Abstract: Efficient actuation control of flapping-wing microrobots requires a low-power frequency reference with good absolute accuracy. To meet this requirement, we designed a fully-integrated 10MHz relaxation oscillator in a 40nm CMOS process. By adaptively biasing the continuous-time comparator, we are able to achieve a power consumption of 20μW, a 68% reduction to the conventional fixed bias design. A built-in self-calibration controller enables fast post-fabrication calibration of the clock frequency. Measurements show a frequency drift of 1.2% as the battery voltage changes from 3V to 4.1V.

Design and demonstration of an on-chip AC power source for adiabatic quantum-flux-parametron logic

Abstract: Adiabatic quantum-flux-parametron (AQFP) logic is a promising technology for use in future high-end computers because its bit energy can be potentially reduced to the order of thermal energy. AQFP gates are driven by an AC bias current, which changes their potential energy adiabatically. In the present paper, we propose an on-chip AC power source, which is composed of a Josephson relaxation oscillator and a superconducting resonator, to drive the AQFP gates. We designed and implemented the AC power source using a Nb Josephson integrated circuit process. We confirmed that the AC power source can generate a 4.4 GHz sinusoidal current from a DC bias current and that the output amplitude of the AC power source can be controlled by varying the DC bias current.

A Divide-by-3 0.4–1.4 GHz Injection-Locked Frequency Divider Based on Relaxation Oscillator

Abstract: In this letter, a new topology for divide-by-3 injection-locked frequency divider based on relaxation oscillator is reported. A prototype is designed and implemented in a 90 nm CMOS process technology. The measurement results demonstrate a locking range of 0.4-1.4 GHz with a power consumption of 30 μW.

On-chip clock generating circuit with lower power consumption

Abstract: The invention discloses an on-chip clock generating circuit with lower power consumption. The on-chip clock generating circuit with the lower power consumption comprises a reference current source circuit, a frequency selection circuit, a controlled oscillating circuit and a wave-shaping circuit. The wave-shaping circuit is composed of a comparator, two cascade amplitude limiting circuits and an inverter chain and is used for carrying out amplitude limitation and shaping on the wave shape of output oscillating signals, lowers power consumption and outputs clock signals. The reference current source circuit generates reference current not varying along with the voltage of a power source and temperature, supplies multiple ways of image current sources to the frequency selection circuit, supplies controlled summarize current to a numerical control circuit, inputs the current to the controlled oscillating circuit, changes the frequency of a relaxation oscillator controlled by input current and realizes the functions configurable to the output clock signal frequency. The on-chip clock generating circuit with lower power consumption can be applied to a wake-up circuit and a sensor interface circuit in a wireless transmission radio frequency chip and an on-chip clock generating circuit in a data conversion circuit, and is particularly suitable for the occasions with wide variation range of temperature and voltage of the power source and with high low-power-consumption requirement.