Showing papers on "Spice published in 2014"

A SPICE Model of Resistive Random Access Memory for Large-Scale Memory Array Simulation

Abstract: A SPICE model of oxide-based resistive random access memory (RRAM) for dc and transient behaviors is developed based on the conductive filament evolution model and is implemented in large-scale array simulation. The simulations of one transistor-one resistor RRAM array up to 16 kb with wire resistance (Rwire) and capacitance (Cwire) indicate that: 1) resistance-capacitance delay during RESET and leakage current during SET have significant impact on write operations; 2) with array size enlarging, the power dissipation increases during RESET but decreases during SET; and 3) the increased Rwire and Cwire lead to the degradation of high resistance state and the fluctuation of low resistance state, respectively.

A Memristor SPICE Model Accounting for Volatile Characteristics of Practical ReRAM

Abstract: Realizing large-scale circuits utilizing emerging nanoionic devices known as memristors depends on the accurate modeling of their behavior under a wide range of biasing conditions. Currently, no available SPICE memristor model accounts for both nonvolatile and volatile resistive switching characteristics, the coexistence of which has been recently demonstrated to manifest on practical ReRAM. In this letter, we present a new memristor SPICE model that introduces volatile effects, which can render a rate-dependent bipolar nonvolatile switching operation. The model is demonstrated via a number of simulation cases and is benchmarked against measured results acquired by solid-state TiO2 ReRAM.

Two Memristor SPICE Models and Their Applications in Microwave Devices

Abstract: This paper presents two simple SPICE circuit models of the memristor using two different kinds of integrators. These models expand and simplify the previous methods of solving the memristor's modeling equations presented by Hewlett–Packard Lab. The behaviors of the two memristor models are investigated when they are excited by a sinusoidal voltage source. Both models satisfy the general features of memristive systems such as having a zero-crossing property in the form of an i–v Lissajous figure. In order to explore the unique characteristics and applications of the memristor in microwave devices, first we incorporate the memristor in a microstrip transmission line as a load. We do the analysis using a finite-difference time-domain simulator integrated with a nonlinear SPICE circuit solver. Furthermore, we design a reconfigurable microstrip bandpass filter based on a memristor-loaded resonator, and utilize a memristor as a carrier-wave modulator connecting the microstrip patch antenna to the ground.

SPICE modeling and dynamic electrothermal simulation of SiC power MOSFETs

Abstract: This paper presents a computationally efficient 3-D simulation approach for the dynamic electrothermal analysis of SiC power MOSFETs. The strategy relies on a circuit representation of the whole device, where the electrothermal feedback is enabled through an equivalent electrical network, and the elementary device cell is described by a novel behavioral model accounting for the non-intuitive temperature dependences of key physical parameters.

CCII based more tunable voltage-mode all-pass filters and their quadrature oscillator applications

Abstract: In this paper, two new voltage-mode (VM) first-order all-pass filters using single active element namely second-generation current conveyor (CCII) and a grounding capacitor are proposed. The first proposed filter employs a dual output CCII (DO-CCII) and the other one uses a modified minus type CCII (MCCII−). One of the main advantages of both configurations is their high input impedances; thus, both can be easily cascaded with other VM circuits. Additionally, the use of a grounded capacitor in both circuits provides suitability for integrated circuit (IC) fabrication process. However, both of the proposed circuits need a single passive component matching constraint. Non-ideality analysis is performed for the proposed circuits. Moreover, two quadrature oscillator applications of the proposed filters are given. The behavior of the filters is verified by SPICE simulations. Also, experimental tests using commercially available ICs (AD844s) are achieved for the second proposed configuration.

Memristor-based neuron circuit and method for applying learning algorithm in SPICE?

Abstract: The learning of nonlinearly separable functions in cascaded memristor crossbar circuits is described and the feasibility of using them to develop low-power neuromorphic processors is demonstrated. This is the first study evaluating the training of memristor crossbars through SPICE simulations. It is important to capture the alternate current paths and wire resistance inherent in these circuits. The simulations show that neural network learning algorithms are able to train in the presence of alternate current paths and wire resistances. The fact that the approach reduces the area by three times and power by two orders of magnitude compared with the existing approaches that use virtual ground opamps to eliminate alternate current paths is demonstrated.

SPICE Circuit Modeling of PMA Spin Wave Bus Excited Using Magnetoelectric Effect

Abstract: We propose a formalism of a compact model for circuit simulations of spin wave interconnects. The developed SPICE Spin Wave model is based on the theory of numerical micromagnetics, and serves as a building block for a hierarchical circuit simulation tool for spintronic circuits and systems. We demonstrate excellent agreement between the SPICE model simulations and full micromagnetic solver results. We also present a scheme of exciting spin waves in spin wave bus having perpendicular magnetic anisotropy. Spin waves are excited with an oscillating change of magnetocrystalline anisotropy in a magnetoelectric cell. We use our proposed SPICE model to analyze this structure: determine the length of spin wave attenuation, delay in the bus, and the dependence of amplitude on the change of anisotropy.

Compact modeling of STT-MTJ devices

Abstract: STT-MTJ is a promising device for future high-density and low-power integrated systems. To enable design exploration of STT-MTJ, this paper presents a fully compact model for efficient SPICE simulation. Derived from the fundamental LLG equation, the new model consists of RC elements that are compact equations of device geometry and material properties. They support transient SPICE simulations, providing necessary details beyond the macromodel and enable resilient memory design. The accuracy of the model is validated with numerical results and published data. Scaling analysis shows the sensitivity of STT-MTJ to its geometry. We also did variability analysis with Monte Carlo simulation of the basic 1T1MTJ memory cell to study the bit error rate performance for different transistor size and programming current profile. We show that there is a tradeoff between programming energy and cell area for the same bit error rate constraint. Finally we derive the cell size that achieves minimum energy consumption for a given bit error rate constraint (primary) and latency or area constraint (secondary).

New parallel R-L impedance using single VDTA & its high pass filter application

Abstract: A new parallel resistor-inductor (R-L) impedance simulation circuit has been proposed. The presented configuration employs only one Voltage Differencing Transconductance Amplifier (VDTA) and one grounded capacitor. The workability of new presented R-L impedance circuit is verified by SPICE simulations with 0.18μm CMOS process parameters.

Incorporating hot-carrier injection effects into timing analysis for large circuits

Abstract: This paper focuses on hot-carrier effects in modern CMOS technologies and proposes a scalable method for analyzing circuit-level delay degradations in large digital circuits, using methods that take abstractions up from the transistor to the circuit level. We begin with an exposition of our approach for the nominal case. At the transistor level, a multimode energy-driven model for nanometer technologies is employed. At the logic cell level, a methodology that captures the aging of a device as a sum of device age gains per signal transition is described, and the age gain is characterized using SPICE simulation. At the circuit level, the cell-level characterizations are used in conjunction with probabilistic methods to perform fast degradation analysis. Next, we extend the nominal case analysis to include the effect of process variations. Finally, we show the composite effect of these approaches in the presence of other aging variations, notably bias temperature instability, and study the relative impact of each component of aging on the temporal trends of circuit delay degradations. The analysis approaches for nominal and variational cases are both validated by Monte Carlo simulation on various benchmark circuits, and are proved to be accurate, efficient, and scalable.

SPICE Behavioral Modeling of RF Current Injection in Wire Bundles

Abstract: In this work, a measurement-based procedure aimed at deriving a behavioral model of Bulk Current Injection (BCI) probes clamped onto multi-wire cable bundles is proposed. The procedure utilizes the measurement data obtained by mounting the probe onto the calibration jig for model-parameters extraction, and 2D electromagnetic simulations to adapt such parameters to the specific characteristics of the cable bundle under analysis. Outcome of the analysis is a behavioral model which can be easily implemented into the SPICE environment. Without loss of generality, the proposed model is here used to predict the radio-frequency noise stressing the terminal units of a two-wire harness. Model accuracy in predicting the common and differential mode voltages induced by BCI at the line terminals is assessed by EM modeling and simulation of the involved injection setup by the commercial software CST Microwave Studio. key words: Bulk Current Injection (BCI), conducted immunity, behavioral modeling, SPICE simulation

Advanced SPICE models applied to high power GaN devices and integrated GaN drive circuits

Abstract: This paper describes the application of SPICE models that have been developed for very high power GaN transistors and their integrated drive circuitry. GaN devices that are expected to be used in automotive applications are required to operate at high temperatures and provide very high current operation. The characteristics of drive circuitry must be simulated along with the very large GaN devices when they are used in realistic high power circuits. The present status of both the cascode and the E-Mode GaN structures are described. The particular drive and simulation issues that are presented by current E-Mode GaN transistors are addressed. Using SPICE models, solutions are shown that potentially allow these devices to be used in wide temperature range, and high electrical noise automotive applications.

A free and open source finite-difference simulation tool for solar modules

Abstract: Inhomogeneities and series resistance have a pronounced impact on solar module performance. In the last few years many tools have been developed which model the impact of lateral inhomogeneities and the series resistance arising from the lateral current transport. Particularly popular are SPICE-based models, which use a SPICE circuit simulator to model the solar module (i.e. the involved differential equations are solved through an electronic network equivalent). In this paper we present our new free and open source solar module simulator. Our simulator features a variable, adaptive mesh, which allows fast and accurate simulation of large devices with small geometrical details. Furthermore, the program provides a flexible set of tools to define and simulate complex geometries. Finally, our tool does not depend on SPICE to do the simulations but has its own built-in solver. This reduces overhead as no netlist needs to be generated for SPICE, and, in addition, it allows to use numerical methods optimized for the given problem where the methods used in SPICE are intended for generic electronic circuits.

Efficient Statistical Simulation of Intersymbol Interference and Jitter in High-Speed Serial Interfaces

Abstract: We present and validate against experiments a modeling approach for high-speed serial links that combines the computational advantages of statistical techniques for intersymbol interference (ISI) (improved by employing the realistic pulse shape as from SPICE simulations) and a simple empirical methodology to account for the jitter of the transmitter. The proposed approach is validated by comparison with other modeling approaches such as full SPICE simulations (for ISI) and Simulink (for jitter) as well as against the experimental data for a 2.5 Gb/s CMOS differential transmitter driving different channels.

Grounded Voltage Controlled Positive Resistor with Ultra Low Power Consumption

Abstract: In this work, a new CMOS based grounded voltage controlled positive resistor (GVCPR) with one control voltage is proposed. The proposed GVCPR employs only five CMOS transistors, one operated in triode region and others operated in saturation region or OFF. One of the main properties of the proposed GVCPR is its ultra low power consumption; however, a single active component matching condition is needed. A number of SPICE simulation results using IBM 0.13 μm SIGE013 level-7 CMOS process parameters such as its performance analysis and verification in tunable voltage-mode first-order all-pass filter and high-Q & high-gain voltage-mode multiple-feedback second-order band-pass filter are included to confirm the theory. The superior performance of the proposed GVCPR is also proven by numeric Figure of Merit calculation. DOI: http://dx.doi.org/10.5755/j01.eee.20.7.8023

Modelling the influence of self-heating on characteristics of IGBTs

Abstract: The paper refers to modelling characteristics of IGBT in SPICE software with self-heating taken into account. The form of the electrothermal model of the considered transistor and equations describing this model are proposed. The correctness of the proposed model is verified experimentally during the operation of the examined transistor at different cooling conditions. Particular attention is paid to the non-typical course of characteristics of the considered device at weak excitation and the shape of the obtained characteristics is discussed.

An Equation-Based Circuit Model and Its Generation Tool for 3-D IC Power Delivery Networks With an Emphasis on Coupling Effect

Abstract: In this paper, a methodology to characterize the electrical behaviors of power delivery networks (PDNs) in 3-D integrated circuits is presented. An automation tool is developed to effectively construct SPICE compatible equivalent circuit models of target PDNs. The core of the tool consists of three equation-based algorithms, which not only model the planar PDN and through-silicon vias in detail, but also the interactions between them through the silicon surface. Simulation results from the proposed SPICE model are in close agreement with the ones obtained from the full-wave simulator up to 40 GHz with more than 100 times speedup.

A circuit model of electrostatic discharge generators for ESD and EMC SPICE simulation

Abstract: A circuit model for electrostatic discharge generator is presented in this paper. The model takes into account circuit loading effect and can be easily implemented in SPICE simulators. The discharge current waveforms generated by the model are in compliance with the specifications of the IEC 61000-4-2 standard and the ESD Association Human Metal Model (HMM) standard.

Simplified models of LED ballasts for spice

Abstract: This paper addresses the problematic of usage of electronic ballasts in modern LED lighting equipment. A sample of eleven LED lamps available on the market is analyzed in temporal and frequency based analysis. The topology of the ballasts is determined and modeled using Spice software in a simplified manner. Results of the simulations are verified. Pairs of the lamp models are simulated and compared to original waveforms.

Probabilistic Gate Level Fault Modeling for Near and Sub-Threshold CMOS Circuits

Abstract: This paper presents gate level delay dependent probabilistic fault models for CMOS circuits operating at sub-threshold and near-threshold supply voltages. A bottom-up approach has been employed: SPICE simulations have been used to derive higher level error models implemented using Verilog HDL. HSPICE Monte-Carlo simulations show that the delay dependent probabilistic nature of these faults is due to the process-voltage-temperature (PVT) variations which affect the circuits operating at very low supply voltages. For gate level error analysis, mutant based simulated fault injection (SFI) techniques have been employed for combinational net list reliability analysis. Four types of gate level fault models, with different accuracies, are proposed. Our findings show that the proposed SFI method presents a 2X-5X simulation time overhead compared to the simulation of the gold circuit, with respect to SPICE analysis, the proposed method requires three orders of magnitude less simulation time.

SPICE video coding and decoding expansion method and system based on H264

Abstract: The invention provides an SPICE video coding and decoding expansion method based on H264. The SPICE video coding and decoding expansion method comprises the steps that an extra complementary package needed for supporting system operation is provided; the ability of an SPICE protocol client side to conduct H264 decoder expansion is provided; the ability of an SPICE protocol server to conduct H264 coder expansion is provided; the SPICE protocol server and the SPICE protocol client side conduct H264 ability negotiation; the SPICE protocol server provides a code dynamic selection algorithm and an upper-layer configuration interface of H264 and MJPEG. By the adoption of the SPICE video coding and decoding expansion method based on H264, the network bandwidth occupied by the SPICE protocol in a video playing scene is reduced greatly, more abundant video coding and decoding strategies are provided for the SPICE protocol, the compatibility is guaranteed, a good SPICE protocol H264 video coding and decoding configuration method or a good SPICE protocol H264 video coding and decoding configuration interface is provided, and software secondary development conducted in a virtual machine is not needed.

Numerical Simulation and Spice Modeling of Organic Thin FilmTransistors (OTFTs)

Abstract: As organic thin film transistors are playing important role in low cost, large area and flexible integrated circuits, there is urgent need of accurate modeling and simulation of these devices with emphasis of compact modeling suitable in integrated circuit simulation using Spice like simulators. This paper presents a 2D numerical simulation of pentacene based organic thin film transistors. Also a spice model extraction methodology of OTFTs base on Silvaco's UOTFT model is presented for circuit simulation. The numerically simulated results are in good agreement with OTFT spice modeling results. The Organic TFT model is extracted from the numerically simulated data and further it is used in circuit simulation of CMOS like hybrid inverter and five stage ring oscillator circuit realized from hybrid inverter. In the hybrid inverter circuit an amorphous silicon TFT is used in place of the NMOS devices and a Pentacene based TFT is used in place of the PMOS devices. Circuit simulation results proves the applicability of the model in circuit design of organic thin film based transistors.

Signal integrity and propagation delay analysis using FDTD technique for VLSI interconnects

Abstract: In UDSM technology, on-chip interconnect wires form a complex geometry and introduces wire and coupling parasitics. The coupling parasitics (M,C C ) introduce crosstalk noise which may lead to critical delays/logic malfunctions. This paper analyzes the dependency of crosstalk noise and delay on coupling parasitics for simultaneously switching inputs using FDTD technique. The FDTD method is used because it is a strong mathematical platform for the analysis of time domain behavior of coupled lines. For implementation of FDTD algorithm, discretizations are carried out in time and space both. To ensure stability in FDTD solution, the discrete voltage points are interlaced by current points in both space and time. To validate the proposed method, FDTD computations are carried out and results are compared with those of conventional SPICE results. A good agreement of FDTD results has been observed with respect to SPICE results. An average error of less than 2 % is observed for the proposed FDTD algorithm with respect to SPICE.

Modeling of temperature effects in a surface-potential based ASM-HEMT model

Abstract: Here, we present the modeling of temperature effects in the surface potential based “Advanced Spice Model for High Electron Mobility Transistor” (ASM-HEMT) for AlGaN/GaN HEMTs. We extract the temperature dependencies of mobility, saturation velocity, cut-off voltage and access resistance parameters of this model. This enables accurate modeling of I-V, g m and g ds at multiple temperatures. Our model is compared with measured data and shows excellent fitting for a wide range of temperature.

Re-model fabricated memristor behavior in LT-SPICE and applied in logic circuit

Abstract: A fabricated memristor behavior has been remodel in LT-SPICE and presented in this paper. Memristor SPICE models are important for designers to exhibit memristor behavior since memristor is not yet available in market. Among important parameters in memristor SPICE model is R ON , R OFF and TiO 2 thickness. This is because different R ON and R OFF value results in different switching behavior. In this paper, R ON and R OFF are obtained from fabricated memristor graph gradient. The values are applied as memristor model parameters. The behavior of this model is in agreement with the measurements of fabricated memristor. Next, NAND and NOR circuits are designed using the SPICE model and circuits are working based on the simulation results. The memristor SPICE model parameters are based on fabricated memristor model and it has similar behavior with fabricated memristor model. Thus it is convincing that fabricated memristor will work in real circuit.