G
Gillis Winderickx
Researcher at Katholieke Universiteit Leuven
Publications - 19
Citations - 834
Gillis Winderickx is an academic researcher from Katholieke Universiteit Leuven. The author has contributed to research in topics: Dielectric & Leakage (electronics). The author has an hindex of 12, co-authored 19 publications receiving 807 citations.
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Journal ArticleDOI
Germanium MOSFET Devices: Advances in Materials Understanding, Process Development, and Electrical Performance
David P. Brunco,B. De Jaeger,Geert Eneman,Jerome Mitard,Geert Hellings,Alessandra Satta,Valentina Terzieva,Laurent Souriau,Frederik Leys,Geoffrey Pourtois,Michel Houssa,Gillis Winderickx,E. Vrancken,Sonja Sioncke,Karl Opsomer,G. Nicholas,Matty Caymax,Andre Stesmans,J. Van Steenbergen,Paul W. Mertens,Marc Meuris,M.M. Heyns +21 more
TL;DR: In this article, thin, strained epi-Si is examined as a passivation of the Ge/gate dielectric interface, with an optimized thickness found at 6 monolayers.
Proceedings ArticleDOI
High performance Ge pMOS devices using a Si-compatible process flow
Paul Zimmerman,G. Nicholas,B. De Jaeger,Ben Kaczer,Andre Stesmans,Lars-Ake Ragnarsson,David P. Brunco,Frederik Leys,Matty Caymax,Gillis Winderickx,Karl Opsomer,Marc Meuris,M.M. Heyns +12 more
TL;DR: In this article, a Si-compatible process flow without the incorporation of strain was demonstrated using Ge transistors with gate lengths ranging from 10 mum down to 0.125 mum, the shortest ever reported.
Journal ArticleDOI
Optimisation of a thin epitaxial Si layer as Ge passivation layer to demonstrate deep sub-micron n- and p-FETs on Ge-On-Insulator substrates
B. De Jaeger,Renaud Bonzom,Frederik Leys,O. Richard,J. Van Steenbergen,Gillis Winderickx,E. Van Moorhem,G. Raskin,Fabrice Letertre,T. Billon,Marc Meuris,M.M. Heyns +11 more
TL;DR: In this article, a thin epitaxially grown Si layer is used as the high-k dielectric to obtain low interface state density and high carrier mobility for Ge MOSFETs.
Proceedings ArticleDOI
Record I ON /I OFF performance for 65nm Ge pMOSFET and novel Si passivation scheme for improved EOT scalability
Jerome Mitard,B. De Jaeger,Frederik Leys,Geert Hellings,Koen Martens,Geert Eneman,David P. Brunco,Roger Loo,Jing-Cheng Lin,Denis Shamiryan,T. Vandeweyer,Gillis Winderickx,E. Vrancken,C.H. Yu,K. De Meyer,Matty Caymax,Luigi Pantisano,Marc Meuris,M.M. Heyns +18 more
TL;DR: In this paper, a 65 nm Ge pFET with a record performance of Ion = 478muA/mum and Ioff,s= 37nA /mum @Vdd= -1V.
Journal ArticleDOI
Heavy ion implantation in Ge: Dramatic radiation induced morphology in Ge
Tom Janssens,Cedric Huyghebaert,Danielle Vanhaeren,Gillis Winderickx,Alessandra Satta,Marc Meuris,Wilfried Vandervorst +6 more
TL;DR: In this paper, a SiO2 capping layer on top of Ge prevents the formation of the surface roughness, but has limited impact on the void formation, which originates from vacancy clustering during the implant process.