Actel

About: Actel is a based out in . It is known for research contribution in the topics: Antifuse & Field-programmable gate array. The organization has 364 authors who have published 402 publications receiving 12674 citations.

Repeatable block producing a non-uniform routing architecture in a field programmable gate array having segmented tracks

Abstract: A repeatable non-uniform segmented routing architecture in a field programmable gate array comprising: a repeatable block of routing tracks, the routing tracks grouped into sets of routing tracks, each set having a first routing track in a first track position, a second routing track in a last track position, a programmable element, and a direct address device for programming the programmable element; wherein at least one of the routing tracks is segmented into non-uniform lengths by the programmable element and the second routing track crosses-over to the first track position in a region adjacent to an edge of the repeatable block; and wherein a first plurality of the routing track sets proceed in a horizontal direction and a second plurality of the routing track sets proceed in a vertical direction.

Method of making a MOS transistor having improved total radiation-induced leakage current

Abstract: A method for fabricating a shallow-trench isolation transistor an a semi-conductor substrate includes forming a single isolation trench having a uniform cross section to define an active region in the silicon substrate. The method includes performing sidewall isolation implants on the side and bottom walls of said isolation trench. The method includes depositing a dielectric isolation material in said isolation trench. The method includes planarizing the top surface of said silicon substrate and said dielectric isolation material. The method includes forming a gate oxide layer over said active region in said silicon substrate. The method includes forming and defining gate regions over said oxide layer in said active region in said silicon substrate. The method includes forming source and drain regions in the active region in the silicon substrate.

SRAM cell controlled by non-volatile memory cell

Abstract: First and second complimentary static random-access-memory cell bit lines are coupled to first and second bit nodes through first and second access transistors controlled by a word line A first inverter has an input coupled to the first bit node and an output coupled to the second bit node A second inverter has an input coupled to the second bit node and an output coupled to the first bit node through a first transistor switch A transistor switch is coupled between the output of a non-volatile memory cell and the first bit node A control circuit coupled to the gate of the transistor switch Either the drive level of the non-volatile memory cell is selected to overpower the output of the second inverter or the second inverter is decoupled from the first bit node while the output of the non-volatile memory cell is coupled to the first bit node

Reduced leakage antifuse structure and fabrication method

Abstract: An antifuse (10) comprises an antifuse material (24) disposed between a lower conductive electrode (14) and an upper conductive electrode (26). The antifuse material (24) comprises a layer of amorphous silicon (20) disposed between two layers of silicon nitride (16, 20). A thin layer of silicon dioxide (18) is disposed between the layer of amorphous silicon (20) and one of the silicon nitride layers (16, 22).

Method and apparatus for a flexible chargepump scheme for field-programmable gate arrays

Abstract: A programmable gate array comprising: a plurality of logic modules, each logic module having at least one output coupled to an isolation transistor, each isolation transistor in each of the plurality of logic modules having a gate; and a charge pump having a pump-voltage output line coupled to the gates of each isolation transistor in each of the plurality of logic modules. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims, 37 CFR 1.72(b).