Actel

About: Actel is a based out in . It is known for research contribution in the topics: Antifuse & Field-programmable gate array. The organization has 364 authors who have published 402 publications receiving 12674 citations.

Method of forming an antifuse element with substantially reduced capacitance

Abstract: A minimum sized aperture for a reduced capacitance anti-fuse or other structure may be formed by birds beak encroachment of thick oxide under a masking layer or by isotropic etching of a masking layer followed by birds beak encroachment of thick oxide.

Multi-level routing architecture in a field programmable gate array having transmitters and receivers

Abstract: A routing architecture in a field programmable gate array (FPGA) having a plurality of logic clusters wherein each logic cluster has at least two sub-clusters. The logic clusters are arranged in rows and columns and each logic clusters has a plurality of receiver components, a plurality of transmitter components, at least one buffer module, at least one sequential logic component and at least one combinatorial logic component. A first-level routing architecture is programmably coupled to the logic clusters and a second-level routing architecture is programmably coupled to the logic clusters and to the first-level routing architecture through at least one of the transmitter components and at least one of the receiver components.

Quadratic and cubic compensation of sigma-delta D/A and A/D converters

Abstract: A circuit and method for compensating sigma-delta modulators in A/D and D/A converters is disclosed. Circuits according to the invention use a low-resolution Sigma-Delta encoded version of the signal to inexpensively encode quadratic and cubic compensation terms. These circuits can encode quadratic and cubic compensation signals with acceptably low quantization noise without requiring the use of expensive multi-bit multipliers to compute the square or cube of the signal. The method includes providing a binary word Q or a binary word C (or both) representing the desired amount of quadratic or cubic compensation to apply. Because the encoded quadratic and cubic signals have only one or a few bits, they can be multiplied by Q and C without the use of expensive multi-bit multipliers and applied to the modulator input or output to provide a compensated result.

Radiation Tolerant Antifuse FPGA

Abstract: The total dose performance of the antifuse FPGA for space applications is summarized. Optimization of the radiation tolerance in the fabless model is the main theme. Mechanisms to explain the variation in different products are discussed.

Switch bound allocation for maximizing routability in timing-driven routing of FPGA's

Abstract: In segmented channel routing of row-based FPGA's, the routability and interconnection delays depend on the choice of upper bounds on the number of programmable switches allocated for routing net segments in the channel. Traditionally, the upper bounds for the net segments in the same channel are set uniformly. In this paper, we present algorithms for determining the upper bounds for all of the net segments of a net simultaneously, so that the predefined source-to-sink delay bound on the net is satisfied and the routability of the net is maximized. The upper bounds on net segments in a channel determined by the algorithms in general are nonuniform. Experimental results show that the algorithms can significantly improve routability and reduce delay bound violation as compared with the traditional, uniform upper bound approach.