Actel

About: Actel is a based out in . It is known for research contribution in the topics: Antifuse & Field-programmable gate array. The organization has 364 authors who have published 402 publications receiving 12674 citations.

corner i/o pad density

Abstract: An integrated circuit die has a plurality of I/O cells disposed about its periphery, each I/O cell having an I/O bonding pad. A first group of I/O cells is disposed at the periphery of the die at locations away from corners of the die, each of the first group of I/O cells having an I/O pad disposed thereon and spaced at a first distance from the periphery of the die. A second group of I/O cells is disposed at the periphery of the die at locations away from corners of the die, each of the second group of I/O cells having an I/O pad disposed thereon and spaced at a distance from the periphery of the die more than the first distance, the distance increasing as a function of the proximity of each I/O cell to a corner of the die.

Mixed-signal system-on-a-chip analog signal direct interconnection through programmable logic control

Abstract: A programmable analog circuit includes a plurality of analog inputs, a differential analog buffer, a digital-to-analog converter, an analog-to-digital converter, and an operational amplifier having an inverting input and a non-inverting input. An analog switching network is coupled between the plurality of analog inputs, the differential analog buffer, the digital-to-analog converter, the analog-to-digital converter, and the operational amplifier and is configured to allow programmable connections from any of the plurality of analog inputs, the differential analog buffer, and the digital-to-analog converter to the inverting input and a non-inverting input; of the operational amplifier. An array of programmable logic is programmably coupled to the input to the digital-to-analog converter and the output of the analog-to-digital converter.

Switching elements, the key to FPGA architecture

Abstract: The architectural characteristics of FPGAs lie deep in their switching elements. Everything from the choice of logic blocks to the routing segmentation is influenced by these switches. SRAM switches provide the possibility of reprogramming the device. However, this feature comes at a prohibitive price: large area and reduced performance. Unless the reprogrammability of an FPGA is an absolute requirement, the antifuse based FPGAs provide a better solution to the switching requirements inside an FPGA. In most design environments, the cost of implementing a design on an FPGA is not dominated by the unit cost of the FPGAs programmed in the development phase. The dominant cost is the engineering time spent on achieving performance goals and the risks involved in not reaching the market on time. >

Physical optimization for FPGAs using post-placement topology rewriting

Abstract: Due to poor correlations between pre- and post-placement timing analysis, many post-placement optimization strategies have been proposed for the FPGA CAD flow to improve circuit performance. Typically, these methods depend on logic duplication or decomposition methods combine together with incremental placement.Circuit rewriting has proven to be a useful optimization strategy, but is typically applied during the technology mapping step of the FPGA CAD flow. While beneficial, rewriting either before or after technology mapping must rely on circuit depth rather than post-placement delays for timing optimization.In this paper, we show that circuit rewriting can also be used as a post-placement optimization for FPGAs. We present a post-placement optimization based on circuit rewriting which is guided by post-placement timing analysis. We replace, or rewrite, cones of logic on critical paths to improve the timing performance of a circuit. Our method is integrated with incremental placement to ensure valid placements and to guarantee that our timing analysis remains accurate throughout our proposed rewriting method. The key to our method is the ability to quickly determine if an alternative topology of LUTs is suitable for the replacement of a cone of logic on a critical path.We have implemented our proposed method in a commercial FPGA CAD flow. Experimental results demonstrate that the application of our rewriting algorithm can improve the routed timing performance of a design by 3.1% on average and by as much as 37.9% when applied to a set of 136 industrial designs.

Chapter 7 – Calculation of Optical Constants, n and k, in the Interband Region

Abstract: Publisher Summary This chapter presents a unified formulation of the optical properties of materials. This formulation is essentially applicable to amorphous semiconductor and dielectrics, crystalline semiconductors and dielectrics, and metals; throughout the fundamental optical energy range and the interband region. In specific, chapter deduces equations for the extinction coefficient, k(E), and the refractive index, n(E). It is noted that amorphous semiconductors and dielectrics are distinguished from the crystalline semiconductors and dielectrics and metals by the number of terms in the equations for k(E) and n(E) that is equal to the number of spectral peaks. Optical constants are related to each other through the Kramers-Kronig dispersion relation. This relation is a consequence of the principle of causality, which states that no signal travels faster than the speed of light in vacuum. There are several other formulations of optical properties in the fundamental optical regime—such as empirical formulas, harmonic-oscillator models, quantum mechanical treatments, and point-by-point analyses of the Brillouin zone.