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Journal ArticleDOI

A Subthreshold Swing Model for Symmetric Double- Gate (DG) MOSFETs with Vertical Gaussian Doping

Pramod Kumar Tiwari, +1 more
- 30 Jun 2010 - 
- Vol. 10, Iss: 2, pp 107-117
TLDR
An analytical subthreshold swing model is presented for symmetric double-gate (DG) MOSFETs with Gaussian doping profile in vertical direction based on the effective conduction path effect (ECPE) concept, believed to provide a better physical insight and understanding of DG MOSfET devices operating in the subth threshold regime.
Abstract
An analytical subthreshold swing model is presented for symmetric double-gate (DG) MOSFETs with Gaussian doping profile in vertical direction. The model is based on the effective conduction path effect (ECPE) concept of uniformly doped symmetric DG MOSFETs. The effect of channel doping on the subthreshold swing characteristics for non-uniformly doped device has been investigated. The model also includes the effect of various device parameters on the subthreshold swing characteristics of DG MOSFETs. The proposed model has been validated by comparing the analytical results with numerical simulation data obtained by using the commercially available ATLAS™ device simulator. The model is believed to provide a better physical insight and understanding of DG MOSFET devices operating in the subthreshold regime.

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Citations
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Journal ArticleDOI

Analytical Modeling and Simulation of Dual Material Gate Tunnel Field Effect Transistors

TL;DR: In this article, a 2D analytical model of a dual material gate tunnel field effect transistor (DMG TFET) is presented, where the parabolic approximation technique is used to solve the 2-D Poisson equation with suitable boundary conditions.
Journal ArticleDOI

A two-dimensional model for the subthreshold swing of short-channel double-gate metal–oxide–semiconductor field effect transistors with a vertical Gaussian-like doping profile

TL;DR: In this paper, an analytical two-dimensional model for the subthreshold swing of the short-channel double-gate (DG) MOSFET with a vertical Gaussian-like doping profile is presented.
Journal ArticleDOI

Modeling source/drain lateral Gaussian doping profile of DG-MOSFET using Green’s function approach

TL;DR: In this paper, a two-dimensional analytical model of the double-gate MOSFET at the sub-threshold regime of operation was derived by considering the effect of inevitable source/drain (S/D) lateral Gaussian doping profile.
Journal ArticleDOI

Analytical Modelling and Simulation of Triple Material Quadruple Gate Tunnel Field Effect Transistors

TL;DR: In this paper, the authors build up the electrostatic model for Triple Material Quadruple Gate (TMQG) tunnel field effect transistor of rectangular cross area, in view of semi 3D strategy.
Journal ArticleDOI

A Subthreshold Current Model of Fully-Depleted Silicon-on-Insulator Metal-Oxide-Semiconductor Field Effect Transistors with Vertical Gaussian Profile

TL;DR: In this article, a sub-threshold swing model is proposed for the short-channel fully-depleted (FD) silicon-on-insulator (SOI) metal-oxide-semiconductor field effect transistors (MOSFETs) with vertical Gaussian doping profile.
References
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Journal ArticleDOI

Scaling the Si MOSFET: from bulk to SOI to bulk

TL;DR: In this article, the scaling of fully depleted SOI devices is considered and the concept of controlling horizontal leakage through vertical structures is highlighted, and several structural variations of conventional SOI structures are discussed in terms of a natural length scale to guide the design.
Journal ArticleDOI

Double-gate silicon-on-insulator transistor with volume inversion: A new device with greatly enhanced performance

TL;DR: The double-gate control of silicon-on-insulator (SOI) transistors is used to force the whole silicon film (interface layers and volume) in strong inversion as discussed by the authors.
Journal ArticleDOI

Scaling theory for double-gate SOI MOSFET's

TL;DR: In this paper, a scaling theory for double-gate SOI MOSFETs is presented, which gives guidance for device design that maintains a sub-threshold factor for a given gate length.
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