Proceedings ArticleDOI
Low power, high speed VLSI circuits in 16nm technology
Sudhakar Alluri,B. Balaji,Ch. Cury +2 more
- Vol. 2358, Iss: 1, pp 030001
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TLDR
In this paper, the performance of the proposed 6T-SRAM cell using FINFET has been evaluated for this operation with low power domain, showing smaller SCEs, ultra-small acceptable time and stability.Abstract:
In this paper deals with simulation of FINFET device and subsequent application to a design of 6 Transistor Static RAM cell with FINFET as well as analysis of design issues and accomplishment metrics of advanced SRAM cells. As an initiation, the performance of the suggested 6T-SRAM cell using FINFET has been evaluated for this operation with low power domain, showing smaller SCEs, ultra-small acceptable time and Hugh stability. The static noise margin, leakage current, power dissipation & sub threshold current of 6 Transistor Static RAM using FINFET have been compared with MOSFET 6 Transistor Static RAM cell at 45nm technology node. After the remarkable reduction in Leakage current and power reduction, the same approach is then implemented to advanced SRAM cells. We have compared various advanced proposed SRAM cells using FINFET with the conventional advanced MOSFET with Static RAM. The significant leakage reduction have been observed when anyone switch from conventional MOSFET’s to FINFET’s. Leakage current for conventional MOSFET’s based 7T, 8T, 9T, 10T, 11T & 12T is 74.99 pA, 70.22 pA, 74.83 pA, 67.63 pA, 74.71pA, 63.56 pA and 73.96 pA respectively which have been reduced to 76.550 fA, 76.150 fA, 74.302 fA, 74.012 fA, 70.856 fA and 70.423 fA respectively for advanced FINFET based SRAM cells. Power dissipation for conventional MOSFET based 7, 8, 9, 10, 11& 12Transistor is 81.51nW, 80.77nW, 81.47nW, 79.47nW, 81.39nW, 78.59nW and 81.27nW respectively which have reduced to 9.972nW, 9.815nW, 9.565nW, 9.432nW, 9.148nW and 9.046nW respectively for advanced FINFET based SRAM cells.read more
Citations
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A Qualitative Review on Tunnel Field Effect Transistor- Operation, Advances, and Applications
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Improved Drain Current Characteristics of HfO2/SiO2 Dual Material Dual Gate Extension on Drain Side-TFET
B. Balaji,K. Srinivasa Rao,Kondavitee Girija Sravani,K. B,N. V. Bindu Madhav,K. Chandrahas,B. Jaswanth +6 more
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Design, Performance Analysis of GaAs/6H-SiC/AlGaN Metal Semiconductor FET in Submicron Technology
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Device Design, Simulation and Qualitative Analysis of GaAsP/ 6H-SiC/ GaN Metal Semiconductor Field Effect Transistor
Book ChapterDOI
Device Design and Modeling of Fin Field Effect Transistor for Low Power Applications
TL;DR: In this paper , the authors developed a novel structure of FinFETs for various low power VLSI applications with all DC and AC improved parameters such as on current, off current, threshold voltage, drain conductance, transconductance, and on resistance.
References
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Proceedings ArticleDOI
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Proceedings ArticleDOI
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TL;DR: In this paper, the authors compared 6T, 8T and 9T SRAM cell on the basis of read noise margin (RNM), write noise margin, read delay, write delay, data retention voltage (DRV), layout and parasitic capacitance.
Proceedings ArticleDOI
22FFL: A high performance and ultra low power FinFET technology for mobile and RF applications
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TL;DR: A FinFET technology named 22FFL has been developed that combines high-performance, ultra-low power logic and RF transistors as well as single-pattern backend flow for the first time to create a new 6T low-leakage SRAM with bit cell leakage of sub 1pA/cell.
Proceedings ArticleDOI
Design and analysis of low power SRAM cells
TL;DR: The results show that the MTCMOS based SRAM cell is the best performer in terms of power consumption and write delay and it uses 38.1% less power than the conventional 6TSRAM cell.