Journal ArticleDOI
Silicon nanowire transistor with a channel width of 4 nm fabricated by atomic force microscope nanolithography
Javier Martínez,Ramses V. Martinez,Ricardo Garcia +2 more
- Vol. 8, Iss: 11, pp 3636-3639
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TLDR
An atomic force microscopy lithography that enables the reproducible fabrication of complex single-crystalline silicon nanowire field-effect transistors with a high electrical performance is demonstrated.Abstract:
The emergence of an ultrasensitive sensor technology based on silicon nanowires requires both the fabrication of nanoscale diameter wires and the integration with microelectronic processes. Here we demonstrate an atomic force microscopy lithography that enables the reproducible fabrication of complex single-crystalline silicon nanowire field-effect transistors with a high electrical performance. The nanowires have been carved from a silicon-on-insulator wafer by a combination of local oxidation processes with a force microscope and etching steps. We have fabricated and measured the electrical properties of a silicon nanowire transistor with a channel width of 4 nm. The flexibility of the nanofabrication process is illustrated by showing the electrical performance of two nanowire circuits with different geometries. The fabrication method is compatible with standard Si CMOS processing technologies and, therefore, can be used to develop a wide range of architectures and new microelectronic devices.read more
Citations
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Journal Article
Pattern Transfer of Hydrogen Depassivation Lithography Patterns into Silicon with Atomically Traceable Placement and Size Control | NIST
Josh B. Ballard,Stephen McDonnell,D. Dick,Maia Bischof,Joseph Fu,David L. Jaeger,James H. G. Owen,William R. Owen,Justin Alexander,Udi Fuchs,Pradeep Namboodiri,Kai Li,John N. Randall,Robert M. Wallace,Yves J. Chabal,Richard F. Reidy,Richard M. Silver +16 more
TL;DR: In this paper, the authors demonstrate a method for tracking atomically resolved and controlled structures from initial template definition through final nanostructure metrology, opening up a pathway for top-down atomic control over nanofabrication.
Journal ArticleDOI
Effect of geometric parameters on the performance of p-type junctionless lateral gate transistors.
Farhad Larki,Arash Dehzangi,Sawal Hamid Md Ali,Azman Jalar,Md. Shabiul Islam,Mohd Nizar Hamidon,Burhanuddin Yeop Majlis +6 more
TL;DR: This paper examines the impact of two important geometrical parameters, namely the thickness and source/drain extensions on the performance of low doped p-type double lateral gate junctionless transistors (DGJLTs).
Book ChapterDOI
Fabrication of Nanowires for Biosensing Applications
Thomas Shan Yau,Gregory Pandraud,Louis C. P. M. de Smet,Ernst J. R. Sudhölter,Cees J.M. van Rijn,Pasqualina M. Sarro +5 more
Journal ArticleDOI
Fabrication and simulation of single crystal p-type Si nanowire using SOI technology
Arash Dehzangi,Farhad Larki,Mahmud G. Naseri,Manizheh Navasery,Burhanuddin Yeop Majlis,M. F. Mohd Razip Wee,M. K. Halimah,Md. Shabiul Islam,Sawal Hamid Md Ali,Elias Saion +9 more
TL;DR: In this paper, a top-down fabrication approach as atomic force microscope (AFM) nanolithography was performed on Si on insulator (SOI) substrate to fabricate a single crystal p-type SiNW.
Patent
SILICON NANOWIRE TRANSISTOR (SiNWT) AND PROCESS FOR FABRICATING THE SAME
TL;DR: In this article, a silicon nanowire transistor is fabricated on a silicon-on-insulator (SOI) wafer, comprising a source pad, drain pad, a lateral gate pad, and a silicon wire as channel.
References
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Journal ArticleDOI
Functional nanoscale electronic devices assembled using silicon nanowire building blocks.
Yi Cui,Charles M. Lieber +1 more
TL;DR: The facile assembly of key electronic device elements from well-defined nanoscale building blocks may represent a step toward a "bottom-up" paradigm for electronics manufacturing.
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Coaxial silicon nanowires as solar cells and nanoelectronic power sources
Bozhi Tian,Xiaolin Zheng,Thomas J. Kempa,Ying Fang,Nanfang Yu,Guihua Yu,Jinlin Huang,Charles M. Lieber +7 more
TL;DR: These coaxial silicon nanowire photovoltaic elements provide a new nanoscale test bed for studies of photoinduced energy/charge transport and artificial photosynthesis, and might find general usage as elements for powering ultralow-power electronics and diverse nanosystems.
Journal ArticleDOI
Label-free immunodetection with CMOS-compatible semiconducting nanowires
Eric Stern,James F. Klemic,David A. Routenberg,Pauline N. Wyrembak,Daniel B. Turner-Evans,Andrew D. Hamilton,David A. LaVan,Tarek M. Fahmy,Mark A. Reed +8 more
TL;DR: This work reports an approach that uses complementary metal oxide semiconductor (CMOS) field effect transistor compatible technology and hence demonstrates the specific label-free detection of below 100 femtomolar concentrations of antibodies as well as real-time monitoring of the cellular immune response.
Journal ArticleDOI
Electrical detection of single viruses
Fernando Patolsky,Gengfeng Zheng,Oliver Hayden,Melike Lakadamyali,Xiaowei Zhuang,Charles M. Lieber +5 more
TL;DR: Direct, real-time electrical detection of single virus particles with high selectivity by using nanowire field effect transistors is reported, suggesting potential for simultaneous detection of a large number of distinct viral threats at the single virus level.
Journal ArticleDOI
Sequence-Specific Label-Free DNA Sensors Based on Silicon Nanowires
TL;DR: Highly sensitive and sequence-specific DNA sensors were fabricated based on silicon nanowires with single stranded probe DNA molecules covalently immobilized on the nanowire surfaces, recognizing label-free complementary ss-DNA in sample solutions when the target DNA was hybridized with the probe DNA attached on the SiNW surfaces.