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Proceedings ArticleDOI

Strong correlation between dielectric reliability and charge trapping in SiO/sub 2//Al/sub 2/O/sub 3/ gate stacks with TiN electrodes

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TLDR
In this paper, the authors show that electron trap generation in the bulk of the Al/sub 2/O/sub 3/ films dominates, whereas hole trap near the Si substrate is observed for gate injection.
Abstract
Polarity-dependent charge trapping and defect generation have been observed in SiO/sub 2//Al/sub 2/O/sub 3/ gate stacks with TiN electrodes. For the substrate injection case, electron trapping in the bulk of the Al/sub 2/O/sub 3/ films dominates, whereas hole trap near the Si substrate is observed for gate injection. This asymmetry in defect creation causes an asymmetry in oxide reliability. For gate injection, reliability is limited by the thin SiO/sub 2/ interfacial layer, yielding low beta values, independent of the Al/sub 2/O/sub 3/ thickness. For substrate injection, reliability is limited by electron trap generation in the bulk of the Al/sub 2/O/sub 3/ film, yielding a strong thickness dependence of the beta values, as expected from the percolation model and as observed in SiO/sub 2/ layers of similar thickness.

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Citations
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Journal ArticleDOI

Influence of Al/sub 2/O/sub 3/ dielectrics on the trap-depth profiles in MOS devices investigated by the charge-pumping method

TL;DR: In this paper, trap density depth profiling based on charge-pumping measurements were applied to Al/sub 2/O/sub 3/ high-k dielectric transistors.
Proceedings ArticleDOI

Evaluation of the positive biased temperature stress stability in HfSiON gate dielectrics

TL;DR: In this paper, the effect of charge trapping on the threshold voltage and transistor drive current of NMOS devices made with HfSiON gate dielectric was investigated and it was shown that the physics of the charge trapping in HnSiON is unique and follows logarithmic dependence with time rather than usual exponential dependence.
Journal ArticleDOI

On the Charge Sheet Superjunction (CSSJ) MOSFET

TL;DR: In this paper, a simple analytical model is developed for the drain-source capacitance of the charge sheet superjunction (CSSJ) MOSFET, and the model is shown to apply to the Superjunction as well.
Proceedings ArticleDOI

Process Integration of Crystalline Pr2O3 High-k Gate Dielectrics

TL;DR: In this paper, the integration of crystalline praseodymium oxide (Pr2O3) high-k gate dielectric was reported and key process steps which are compatible with the highk material have been developed and were applied for realisation of MOS sructures.
Journal ArticleDOI

On the Impact of Defects Close to the Gate Electrode on the Low-Frequency $\hbox{1}/f$ Noise

TL;DR: In this article, the impact of defects close to the gate electrode side on low-frequency 1/f noise in the drain and gate current was studied, where defects are selectively introduced by deposition of a submonolayer of HfO2 dielectric, which induce a large Fermi-level pinning on the gate.
References
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Journal ArticleDOI

New insights in the relation between electron trap generation and the statistical properties of oxide breakdown

TL;DR: In this paper, a percolation-based model for intrinsic breakdown in thin oxide layers is proposed, which can explain the experimentally observed statistical features of the breakdown distribution, such as the increasing spread of the Q/sub BD/-distribution for ultrathin oxides.
Journal ArticleDOI

Anode hole injection, defect generation, and breakdown in ultrathin silicon dioxide films

TL;DR: In this article, hot holes are demonstrated to produce bulk and interfacial defect sites in silicon dioxide layers of metal-oxide-semiconductor structures, and the results presented here are inconsistent with current reliability models which use anode hole injection to explain destructive breakdown of the oxide layer in n-channel field effect transistors where hole currents are small relative to electron currents.
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