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Unequal Error Protection of Memories in LDPC Decoders

TLDR
The devised UEP method is divided in four adjustable levels, each one offering a different degree of protection, and shows an unmatched level of protection from errors at a small complexity and energy cost.
Abstract
Memories are one of the most critical components of many systems: due to exposure to energetic particles, fabrication defects and aging they are subject to various kinds of permanent and transient errors. In this scenario, Unequal error protection (UEP) techniques have been proposed in the past to encode stored information, allowing to detect and possibly recover from errors during load operations, while offering different levels of protection to partitions of codewords according to their importance. Low-density parity-check (LDPC) codes are used in many communication standards to encode the transmitted information: at reception, LDPC decoders heavily rely on memories to store and correct the received information. To ensure efficient and reliable decoding of information, the need to protect the memories used in LDPC decoders is of primary importance. In this paper we present a study on how to efficiently design UEP techniques for LDPC decoder memories. The devised UEP method is divided in four adjustable levels, each one offering a different degree of protection. The full UEP, along with simplified versions, has been implemented within an existing decoder and its area occupation and power consumption evaluated. Comparison with the literature on the subject shows an unmatched level of protection from errors at a small complexity and energy cost.

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Citations
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Journal ArticleDOI

ACOCO: Adaptive Coding for Approximate Computing on Faulty Memories

TL;DR: The Adaptive Coding for approximate Computing (ACOCO) framework is presented, which provides an analysis-guided design methodology to develop adaptive codes for different computations on the data read from faulty memories.
Journal ArticleDOI

SEFI Protection for Nanosat 16-Bit Chip Onboard Computer Memories

TL;DR: Two solutions are presented to protect a nano/pico satellite onboard computer memory prototype with 16-bit data words against SEFIs and SEUs and the approach to provide the error-correction capabilities is based on orthogonal latin square codes.
Proceedings ArticleDOI

Low-power LDPC decoder design exploiting memory error statistics

TL;DR: Simulation results of the proposed low-power LDPC decoder technique demonstrate that, by deliberately adjusting the scaled supply voltage to memory bits in different memory locations, the memory power consumption as well as the overall energy consumption of the LD PC decoder can be significantly reduced with negligible performance loss.
References
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Journal ArticleDOI

On linear unequal error protection codes

TL;DR: The class of codes discussed in this paper has the property that its error-correction capability is described in terms of correcting errors in specific digits of a code word even though other digits in the code may be decoded incorrectly.
Journal ArticleDOI

Fully Parallel Stochastic LDPC Decoders

TL;DR: A hardware architecture for fully parallel stochastic low-density parity-check (LDPC) decoders that provides decoding performance within 0.5 and 0.25 dB of the floating-point sum-product algorithm with 32 and 16 iterations, respectively, and similar error-floor behavior is presented.
Proceedings ArticleDOI

Low-Power High-Throughput BCH Error Correction VLSI Design for Multi-Level Cell NAND Flash Memories

TL;DR: A high-throughput and low-power ECC scheme for MLC NAND flash memories that features byte-wise processing and a low complexity key equation solver using a simplified Berlekamp-Massey algorithm is presented.
Journal ArticleDOI

Linear unequal error protection codes

TL;DR: The properties of linear codes over GF (q) that provide unequal error protection (UEP) of information digits are discussed and a design is proposed for optimal binary systematic linear UEP codes.
Journal ArticleDOI

A Design for Directed Graphs with Minimum Diameter

Imase, +1 more
TL;DR: A simple procedure is proposed that can be used to construct a directed graph whose diameter is less than or equal to that of any previously proposed graph.
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Q1. What have the authors contributed in "Unequal error protection of memories in ldpc decoders" ?

Memories are one of the most critical components of many systems: due to exposure to energetic particles, fabrication defects and aging they are subject to various kinds of permanent and transient errors. In this paper the authors present a study on how to efficiently design UEP techniques for LDPC decoder memories.