Showing papers on "Amorphous silicon published in 1996"

Method of manufacturing a semiconductor device using a metal which promotes crystallization of silicon and substrate bonding

Abstract: A method of manufacturing a semiconductor device, comprises the steps of: forming a first insulating film on a first substrate; forming a second insulating film on the first insulating film; forming an amorphous silicon film on the second insulating film; holding a metal element that promotes the crystallization of silicon in contact with a surface of the amorphous silicon film; crystallizing the amorphous silicon film through a heat treatment to obtain a crystalline silicon film; forming a thin-film transistor using the crystalline silicon film; forming a sealing layer that seals the thin-film transistor; bonding a second substrate having a translucent property to the sealing layer; and removing the first insulating film to peel off the first substrate.

On the Way towards High-Efficiency Thin Film Silicon Solar Cells by the "Micromorph" Concept

Abstract: Recently the authors have demonstrated that compensated or “midgap” intrinsic hydrogenated microcrystalline silicon (μc-Si:H), as deposited by the Very High Frequency Glow Discharge (VHF-GD) technique, can be used as active layer in p-i-n solar cells. Compared to amorphous silicon (a-Si:H), μc-Si:H was found to have a significantly lower energy bandgap ofaround 1 eV. The combination of both materials (two absorbers with different gap energies) leads to a “real” tandem cell structure, which was called the “micromorph” cell. Micromorph cells can make better use of the sun's spectrum in contrast to conventional double-stacked a-Si:H / a-Si:H tandems. The present study will show that the compensation technique (involving boron “microdoping”) used sofar for obtaining midgap μc-Si:H can be replaced by the application of a gas purifier. The use of this gas purifier has a beneficial influence on the transport properties of undoped intrinsic μc-Si:H. By this procedure, increased cell efficiencies in both, single microcrystalline silicon p-i-n as well as micromorph cells could be obtained. In the first case 7.7 % stable, and in the second case 13.1% initial efficiency could be achieved under AMI.5 conditions. Preliminary light-soaking experiments performed on the tandem cells indicate that microcrystalline silicon could contribute to an enhancement of the stable efficiency performance. Micromorph cell manufacturing is fully compatible to a-Si:H technology; however, its deposition rate is still too low. With further increase of the rate, a similar cost reduction potential like in a-Si:H technology can be extrapolated.

Defect-pool model and the hydrogen density of states in hydrogenated amorphous silicon.

Abstract: We present a treatment of the defect-pool model, for the calculation of the density of electronic gap states in hydrogenated amorphous silicon, based on the equilibration of elemental chemical reactions involving the separate release and capture of hydrogen. We derive the corresponding hydrogen density of states, describing the distribution of hydrogen binding energies, and show that the two densities of states are completely consistent. Hydrogen can be captured into weak SiSi bonds, which can be occupied by one or two hydrogen atoms. These are the dominant chemical reactions controlling the defect density. The effective hydrogen correlation energy is variable, being negative for most sites but positive where most defects occur. We show that the electronic density of states reproduces the main features of our earlier defect-pool model, with more charged defects than neutral defects for intrinsic amorphous silicon. The electronic density of states and the corresponding hydrogen density of states are consistent with a wide range of experimental results, including hydrogenation-dehydrogenation and hydrogen diffusion. \textcopyright{} 1996 The American Physical Society.

Fabrication of a silicon micromachined capacitive microphone using a dry-etch process

Abstract: A silicon micromachined capacitive microphone has been fabricated on (100) silicon with PECVD silicon nitride as the diaphragm and backplate material. Amorphous silicon is used as the sacrificial layer and a dry-etch release method is used to free the diaphragm from the backplate. The dry-etch release method eliminates problems associated with the diaphragm and backplate sticking together, which often occurs due to capillary force of the rinse liquid with a wet-etch process. The fabricated microphone has a measured capacitance of 9.5 pF and an open-circuit sensitivity of 7 mV Pa−1 at a bias voltage of 6 V. This bias voltage is about 60% of the maximum allowed voltage that will electrostatically pull the diaphragm and backplate together. The measured frequency response of the microphone is flat within 4 dB from 100 Hz to 10 kHz and shows a gradual increase at higher frequencies.

Capillary waves in pulsed excimer laser crystallized amorphous silicon

Abstract: During short‐pulse laser crystallization of amorphous silicon on quartz, surface roughening occurs via the freezing of capillary waves excited in the silicon melt. The velocity and viscous damping of these capillary waves is computed and discussed. Volume change of the silicon during solidification appears to drive liquid silicon toward the last areas of solidification. Film thickness variation observed by transmission electron microscopy and atomic force microscopy shows increased film thickness at grain boundaries, and vertices of single pulse irradiated films. This effect is most pronounced within a narrow laser fluence regime wherein large lateral grain growth occurs. For 100 nm thick amorphous silicon films on quartz, this regime extends from approximately 520 to 560 mJ/cm2; standard deviation roughness can be as large as 40 nm. These effects have important implications for large area thin film transistor manufacturing.

Semiconductor device formed using a catalyst element capable of promoting crystallization

Abstract: A semiconductor device using a crystalline semiconductor film is manufactured. The crystalline semiconductor film is formed by providing an amorphous silicon film with a catalyst metal for promoting a crystallization thereof and then heated for performing a thermal crystallization, following which the crystallized film is further exposed to a laser light for improving the crystallinity. The concentration of the catalyst metal in the semiconductor film and the location of the region to be added with the catalyst metal are so selected in order that a desired crystallinity and a desired crystal structure such as a vertical crystal growth or lateral crystal growth can be obtained. Further, active elements and driver elements of a circuit substrate for an active matrix type liquid crystal device are formed by such semiconductor devices having a desired crystallinity and crystal structure respectively.

Electrically programmable antifuse incorporating dielectric and amorphous silicon interlayers

Abstract: An antifuse may be fabricated as a part of an integrated circuit in a layer located above and insulated from the semiconductor substrate. The antifuse includes a lower first metal electrode, a first antifuse dielectric layer, preferably silicon nitride, disposed on the lower first electrode and an antifuse layer, preferably amorphous silicon, disposed on the first dielectric layer. An inter-layer dielectric layer is disposed on the antifuse layer and includes an antifuse via formed completely therethrough. A second antifuse dielectric layer, preferably silicon nitride, is disposed over the amorphous silicon layer in the antifuse via, and an upper second metal electrode is disposed over the second dielectric layer in the antifuse via.

Amorphous silicon waveguides and light modulators for integrated photonics realized by low-temperature plasma-enhanced chemical-vapor deposition.

Abstract: A new amorphous silicon waveguide is realized by use of amorphous silicon carbon as cladding material. The structure is characterized both experimentally and theoretically, and its application for optical interconnections in photonic integrated circuits on silicon motherboards is proposed. The fabrication process is based on low-temperature (220 °C) plasma-enhanced chemical-vapor deposition and is compatible with standard microelectronic processes. Propagation losses of 1.8 dB/cm have been measured at the fiber-optic wavelength of 1.3 μm. A strong thermo-optic coefficient has been measured in this material at this wavelength and exploited for the realization of a light-intensity modulator based on a Fabry–Perot interferometer that is tunable by temperature.

Experimental evidence for nanoparticle deposition in continuous argon–silane plasmas: Effects of silicon nanoparticles on film properties

Abstract: These last few years a great effort has been made to understand the mechanisms of powder formation in silane discharges. It is now well established that powders are negatively charged and thus confined in the plasma. Therefore, one does not expect powders to contribute to the deposition, unless the plasma is switched off. We present here experimental evidence for the deposition of nanoparticles, even in the case of a continuous discharge. Experimental conditions for nanoparticle formation while avoiding powder formation have been determined from light‐scattering and transmission electron microscopy measurements. Nanoparticle deposition has been studied by in situ ellipsometry in silane–argon discharges. From a comparison of the growth kinetics and the optical properties of films obtained under continuous and modulated discharges we conclude that nanoparticle deposition can take place even when the discharge is on. The implications of these discoveries on the properties of hydrogenated amorphous silicon ar...

Electrophotographic patterning of thin film circuits

Abstract: Amorphous silicon thin-film transistors on glass foil are made using exclusively electrophotographic printing for pattern formation, contact hole opening, and device isolation. Toner etch masks are applied by feeding the glass substrate through a laser printer or photocopier, or from laser-printed patterns on transfer paper. This all-printed patterning is a low-cost, large-area circuit processing technology, suitable for producing backplanes for active matrix liquid crystal displays.

Methods of forming polycrystalline semiconductor waveguides for optoelectronic integrated circuits, and devices formed thereby

Abstract: Methods of forming polycrystalline semiconductor waveguides include the steps of forming a first cladding layer (e.g., SiO2) on a substrate (e.g., silicon) and then forming a polycrystalline semiconductor layer (e.g., poly-Si) on the first cladding layer using a direct deposition technique or by annealing amorphous silicon (a-Si) to form a polycrystalline layer, for example. The deposited polycrystalline semiconductor layer can then be polished at a face thereof to have a root-mean-square (RMS) surface roughness of less than about 6 nm so that waveguides patterned therefrom have loss ratings of better than 35 dB/cm. The polished polycrystalline semiconductor layer is then preferably etched in a plasma to form a plurality of polycrystalline strips. A second cladding layer is then formed on the polycrystalline strips to form a plurality of polycrystalline waveguides which provide relatively low-loss paths for optical communication between one or more optoelectronic devices coupled thereto. The annealed amorphous silicon layer or deposited polycrystalline layer can also be hydrogenated by exposing the second cladding layer to a hydrogen containing plasma at a temperature and pressure of about 350° C. and 0.16 mTorr, respectively, and for a duration in a range between about 30 and 60 minutes. This further improves the loss ratings of the waveguides to about 15 dB/cm or less.

Process for fabricating a thin film transistor semiconductor device

Abstract: A process for fabricating a semiconductor by crystallizing a silicon film in a substantially amorphous state by annealing it at a temperature not higher than the crystallization temperature of amorphous silicon, and it comprises forming selectively, on the surface or under an amorphous silicon film, a coating, particles, clusters, and the like containing nickel, iron, cobalt, platinum or palladium either as a pure metal or a compound thereof such as a silicide, a salt, and the like, shaped into island-like portions, linear portions, stripes, or dots; and then annealing the resulting structure at a temperature lower than the crystallization temperature of an amorphous silicon by 20° to 150° C.

Amorphous silicon thin-film transistors on steel foil substrates

Abstract: We report the successful fabrication of high-quality a-Si:H thin-film transistors (TFTs) on stainless steel foil substrates. TFTs with an inverted-staggered structure were grown on 200-/spl mu/m thick stainless steel foil. These TFTs show typical ON/OFF current ratios of 10/sup 7/, OFF currents on the order of 10/sup -12/ A, good linear and saturation current behavior, subthreshold slopes of 0.5 V/decade, and linear channel mobilities of 0.5 cm/sup 2//V. In addition, we have demonstrated that these TFTs are capable of withstanding significant mechanical shocks, as well as macroscopic deformation of the substrate, while remaining functional. This work demonstrates that transistor circuits can be made on a flexible, nonbreakable substrate. Such circuits would be highly useful in reflective or emissive displays, and in other applications that require rugged macroelectronic circuits.

Hydrogenated microcrystalline silicon germanium: A bottom cell material for amorphous silicon-based tandem solar cells

Abstract: We have developed hydrogenated microcrystalline silicon germanium, which exhibits a red‐shifted absorption spectrum relative to hydrogenated microcrystalline silicon, as a candidate material for the bottom cell of amorphous silicon‐based tandem solar cells. Optical absorption, x‐ray diffraction, and Raman scattering spectra are presented in addition to optoelectronic properties and light‐induced changes.

MOS device structure and integration method

Abstract: This invention describes a new method for forming self-aligned silicide for application in MOSFET, and a new structure of MOSFET device featuring elevated source and drain, with the objectives of reducing silicide penetration into the source and drain junctions, of eliminating junction spikes, of obtaining smoother interface between the silicide and the silicon substrate, and of reducing the chance of bridging of the silicides on the gate and on the source and drain. The new structure is made by depositing an amorphous layer of silicon on a silicon substrate already patterned with field oxide, gate oxide, polysilicon gate, and silicon nitride spacer on the gate sidewalls. Novel oxide sidewall spacers are then created by first implanting nitrogen into the horizontal surface of the amorphous silicon layer and subsequently thermally oxidizing the part of the amorphous silicon on the vertical sidewalls that is not exposed to nitrogen implantation. A dopant implantation followed by an annealing at 600° C. in nitrogen converts the deposited silicon layer into elevated source and drains. A refractory metal, such as titanium is then deposited over the substrate and, upon rapid thermal annealing, reacts with the elevated source and drain polysilicon to form silicide without consuming the substrate silicon, and without ill effect on the source/drain junctions in the single crystalline silicon. The chance of silicide bridging is greatly reduced due to the special geometry of the novel sidewall oxide spacers.

Raman scattering of alternating nanocrystalline silicon/amorphous silicon multilayers

Abstract: Nanocrystallite size distribution and structural properties in alternating hydrogenated nanocrystalline silicon/amorphous silicon multilayers were investigated by means of Raman scattering. The obtained Raman spectra show a broad peak at ∼480 cm−1 from amorphous Si and some small peaks superposed on the broad peak. According to the positions of the crystallite peak, the mean crystallite size and volume fraction of the crystalline were calculated. Since these small peaks have strong size dependence of their relative intensities, an effect induced by the atomic vibrations from the near‐surface region of nanocrystals is considered to be responsible for the modification of the vibrational properties and the stable photoluminescence from our samples.

Anharmonic Decay of Vibrational States in Amorphous Silicon.

Abstract: Anharmonic decay rates are calculated for a realistic atomic model of amorphous silicon. The results show that the vibrational states decay on picosecond time scales and their decay rates increase with increasing frequency. These results disagree with a recent experiment. In contrast to predictions of the fracton model, we find no evidence that the anharmonic decay is inhibited in the region of localized states.

Aluminum‐induced crystallization and counter‐doping of phosphorous‐doped hydrogenated amorphous silicon at low temperatures

Abstract: Aluminum metal‐induced crystallization and doping of hydrogenated amorphous silicon (a‐Si:H) have been investigated. Aluminum was evaporated onto device quality a‐Si:H films deposited in an ultrahigh vacuum plasma‐enhanced chemical vapor deposition system. These Al/a‐Si:H structures were annealed in the 100–300 °C range. Electrical, surface morphological, and chemical characterizations of the material were performed. The transmission line model technique was used for electrical characterization. Raman spectroscopy showed that crystallization of the interacted a‐Si:H film underneath Al pads initiates at temperatures as low as 180 °C. X‐ray diffraction analysis showed very good polycrystallinity of the interacted film. Electrical measurement, Hall measurement and x‐ray photoelectron spectroscopy analysis results revealed that a‐Si:H film in contact with Al becomes heavily doped by Al during crystallization as a result of annealing at relatively low temperatures.

Low‐loss polycrystalline silicon waveguides for silicon photonics

Abstract: Photonic integrated circuits in silicon require waveguiding through a material compatible with silicon very large scale integrated circuit technology. Polycrystalline silicon (poly‐Si), with a high index of refraction compared to SiO2 and air, is an ideal candidate for use in silicon optical interconnect technology. In spite of its advantages, the biggest hurdle to overcome in this technology is that losses of 350 dB/cm have been measured in as‐deposited bulk poly‐Si structures, as against 1 dB/cm losses measured in waveguides fabricated in crystalline silicon. We report methods for reducing scattering and absorption, which are the main sources of losses in this system. To reduce surface scattering losses we fabricate waveguides in smooth recrystallized amorphous silicon and chemomechanically polished poly‐Si, both of which reduce losses by about 40 dB/cm. Atomic force microscopy and spectrophotometry studies are used to monitor surface roughness, which was reduced from an rms value of 19–20 nm down to ab...

Hydrogen solubility and network stability in amorphous silicon

Abstract: In order to investigate the role of hydrogen in amorphous silicon ~a-Si!, hydrogenated amorphous silicon layers have been prepared by ion implantation at different H concentrations. Implanted samples have been characterized before and after annealing up to 550 °C by small-angle x-ray scattering, secondary-ion-mass spectrometry, and infrared spectroscopy. The study of the evolution of hydrogen concentration profiles and bonding configurations combined with the investigation of the atomic and nanoscale structures of the films indicate the solubility limit of hydrogen in a-Si to lie at 3‐ 4 at. %. This limit is associated with the defectrelated trap concentration in a-Si. If hydrogen is introduced in the matrix at a concentration well above its solubility, the alloy is intrinsically unstable to the formation of hydrogen complexes. Upon annealing at temperatures higher than 300 °C, the excess H ~i.e., above the solubility! leaves the matrix, presumably forming H2 molecules, which accumulate in nanoscale hydrogen complexes. Observations on nucleation and growth of these hydrogen complexes are discussed in light of H diffusion and solubility.

Semiconductor device having a catalyst enhanced crystallized layer

Abstract: Semiconductor devices such as thin-film transistors formed by annealing a substantially amorphous silicon film at a temperature either lower than normal crystallization temperature of amorphous silicon or lower than the glass transition point of the substrate so as to crystallize the silicon film. Islands, stripes, lines, or dots of nickel, iron, cobalt, or platinum, silicide, acetate, or nitrate of nickel, iron, cobalt, or platinum, film containing various salts, particles, or clusters containing at least one of nickel, iron, cobalt, and platinum are used as starting materials for crystallization. These materials are formed on or under the amorphous silicon film.

Method for depositing doped amorphous or polycrystalline silicon on a substrate

Abstract: A method for forming an in-situ doped amorphous or polycrystalline silicon thin film on a substrate is provided. The method includes placing the substrate in a reaction chamber of a CVD reactor and introducing a silicon gas species into the reaction chamber. The flow of the silicon gas species is continued for a time period sufficient to dehydrate the substrate and form a thin layer of silicon. Following formation of the thin layer of silicon, a dopant gas species is introduced into the reaction chamber and continued with the flow of the silicon gas species to form the doped silicon thin film. In an illustrative embodiment a phosphorus doped amorphous silicon thin film for a cell plate of a semiconductor capacitor is formed in a LPCVD reactor.

Method for forming a low impurity diffusion polysilicon layer

Abstract: A method for forming within an integrated circuit a low impurity diffusion polysilicon layer. Formed upon a semiconductor substrate is an amorphous silicon layer. Formed also upon the semiconductor substrate and contacting the amorphous silicon layer is a polysilicon layer. The amorphous silicon layer and the polysilicon layer are then simultaneously annealed to form a low impurity diffusion polysilicon layer. The low impurity diffusion polysilicon layer is a polysilicon multi-layer with grain boundary mis-matched polycrystalline properties. Optionally, a metal silicide layer may be formed upon the amorphous silicon layer and the polysilicon layer either prior to or subsequent to annealing the amorphous silicon layer and the polysilicon layer. The metal silicide layer and low impurity diffusion polysilicon layer may then be patterned to form a polycide gate electrode.

New Interpretation of the Effect of Hydrogen Dilution of Silane on Glow-Discharged Hydrogenated Amorphous Silicon for Stable Solar Cells

Abstract: The effect of hydrogen dilution on glow-discharged hydrogenated amorphous silicon (a-Si:H) is investigated at substrate temperatures of 100?200? C. The dependence of the properties of a-Si:H on the hydrogen dilution ratio ? (?=[ H2 gas flow rate]/[ SiH4 gas flow rate]) can be explained in terms of two different effects: i.e., decrease of the film deposition rate at a low ? and implantation of hydrogen atoms into a-Si:H during and after film deposition at a high ?. The latter effect, which is similar to that of hydrogen plasma post-treatment, increases the hydrogen content (C H) and optical gap (E opt) of a-Si:H with no significant deterioration in photoconductivity or SiH2/SiH ratio estimated from infrared absorption. It is found that the electric conductivity and defect density of a-Si:H, both in the annealed state and light-soaked state, have a better correlation with the hydrogen content with SiH2 bond configurations (C SiH2 ) than with C H or E opt. A conversion efficiency of 8.8% is achieved after light soaking (1.25 sun, AM-1.5, 48? C, open load, 310 h) for a single-junction a-Si:H solar cell using an a-Si:H i-layer with reduced C SiH2 .

Semiconductor device and method for producing the same

Abstract: According to the present invention, a method for producing a semiconductor device in which an active region made of a crystalline silicon film is formed on an insulating surface of a substrate is provided. The method includes the steps of: forming a first amorphous silicon film on the substrate; selectively introducing at least one kind of catalyst elements for promoting the crystallization of the first amorphous silicon film into a part of the first amorphous silicon film before or after forming the first amorphous silicon film; heating the first amorphous silicon film so as to crystallize the first amorphous silicon film in a direction substantially parallel to a surface of the substrate with respect to a region surrounding a region into which the catalyst elements are selectively introduced; forming an insulating thin film in a region on the crystalline silicon film in which crystals are grown in a direction substantially parallel to the surface of the substrate so as to partially remove the insulating thin film and the crystalline silicon film so that a linear boundary is formed along a crystal-growing direction of the crystalline silicon film; forming a second amorphous silicon film on the crystalline silicon film; and crystallizing the second amorphous silicon film by heating or by irradiating a laser beam or an intense light.

Luminescence from amorphous silicon nanostructures.

Abstract: We present a model of size-dependent luminescence from a-Si:H and show that a blueshift of the luminescence energy and a general increase in luminescence quantum efficiency are predicted as structure size decreases. In contrast to bulk a-Si:H structures, highly confineda-Si:H exhibits visible luminescence peak energies and high radiative quantum efficiency at room temperature, which is insensitive to changes in temperature or defect density. We also predict a decrease in mobility and radiative decay time as structure size shrinks. We compare our results with observations of visible light emission from porous silicon. @S0163-1829 ~96!00844-2#

Hydrogen migration in polycrystalline silicon.

Abstract: Hydrogen migration in solid-state crystallized and low-pressure chemical-vapor-deposited (LPCVD) polycrystalline silicon (poly-Si) was investigated by deuterium diffusion experiments. The concentration profiles of deuterium, introduced into the poly-Si samples either from a remote D plasma or from a deuterated amorphous-silicon layer, were measured as a function of time and temperature. At high deuterium concentrations the diffusion was dispersive depending on exposure time. The dispersion is consistent with multiple trapping within a distribution of hopping barriers. The data can be explained by a two-level model used to explain diffusion in hydrogenated amorphous silicon. The energy difference between the transport level and the deuterium chemical potential was found to be about 1.2--1.3 eV. The shallow levels for hydrogen trapping are about 0.5 eV below the transport level, while the deep levels are about 1.5--1.7 eV below. The hydrogen chemical potential ${\mathrm{\ensuremath{\mu}}}_{\mathrm{H}}$ decreases as the temperature increases. At lower concentrations, ${\mathrm{\ensuremath{\mu}}}_{\mathrm{H}}$ was found to depend markedly on the method used to prepare the poly-Si, a result due in part to the dependence of crystallite size on the deposition process. Clear evidence for deuterium deep traps was found only in the solid-state crystallized material. The LPCVD-grown poly-Si, with columnar grains extending through the film thickness, displayed little evidence of deep trapping, and exhibited enhanced D diffusion. Many concentration profiles in the columnar LPCVD material indicated complex diffusion behavior, perhaps reflecting spatial variations of trap densities, complex formation, and/or multiple transport paths. Many aspects of the diffusion in poly-Si are consistent with diffusion data obtained in amorphous silicon. \textcopyright{} 1996 The American Physical Society.

The fabrication and characterization of EEPROM arrays on glass using a low-temperature poly-Si TFT process

Abstract: The fabrication and optimization of poly-Si thin-film transistors and memory devices on glass substrates at temperatures of 200/spl deg/C-400/spl deg/C is described, and the device characteristics and stability are discussed. The devices were formed using PECVD amorphous silicon, silicon dioxide, and silicon nitride films, and the crystallization of the amorphous silicon was achieved with an excimer laser. The performance of 16/spl times/16 EEPROM arrays with integrated drive circuits formed using this technology is presented.