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Showing papers on "Fabrication published in 2008"



Journal ArticleDOI
TL;DR: In this article, the authors characterised and modeled data on fabrication of Si and Sn QD nanostructures in various dielectric matrices by self-organised thin film deposition, with demonstrated confined energy levels of 1.7 eV for 2-nm diameter QDs.

373 citations


Journal ArticleDOI
10 Jan 2008-ACS Nano
TL;DR: Silver vanadium oxide (SVO) and V2O5 nanowires have been hydrothermally synthesized and an electrochromic device was fabricated that displayed a color-switching time of 0.2 s from the bleached state to the colored state and 60% transmittance contrast.
Abstract: Silver vanadium oxide (SVO) and V2O5 nanowires have been hydrothermally synthesized. The as-made nanowires are over 30 µm long and 10–20 nm in diameter. The nanowires have a layered structure with a d-spacing of 1.07 nm. The nanowires can be fabricated into free-standing and flexible sheets by suction filtration. The electrical conductivity of the SVO nanowires is 0.5 S/cm, compared to 0.08 S/cm for the V2O5 nanowires. The Li ion diffusion coefficient in the SVO nanowires was 7 times higher than that in the V2O5 nanowires. An electrochromic device was fabricated from the SVO nanowires that displayed a color-switching time of 0.2 s from the bleached state (green) to the colored state (red-brown) and 60% transmittance contrast.

291 citations


Patent
24 Jul 2008
TL;DR: In this article, a system and methods for solid freeform fabrication of an object is described, and a control unit is configured for controlling the fabrication apparatus and the supply apparatus based on an operation mode selected from a plurality of predetermined operation modes.
Abstract: A system and methods for solid freeform fabrication of an object is disclosed. The system comprises a solid freeform fabrication apparatus having a plurality of dispensing heads, a building material supply apparatus configured to supply a plurality of building materials to the fabrication apparatus, and a control unit configured for controlling the fabrication apparatus and the supply apparatus based on an operation mode selected from a plurality of predetermined operation modes.

241 citations


Journal ArticleDOI
M. Gnan1, Stephen Thoms1, Douglas Macintyre1, R.M. De La Rue1, Marc Sorel1 
TL;DR: Fully etched photonic wires in silicon-on-insulator have been fabricated and propagation loss values as low as 0.92 plusmn 0.14 dB/cm have been obtained.
Abstract: Fully etched photonic wires in silicon-on-insulator have been fabricated and propagation loss values as low as 0.92 plusmn 0.14 dB/cm have been obtained. Hydrogen silsesquioxane (HSQ) was used as an electron beam resist and as a direct mask in the dry-etch processing of the silicon core layer. The dimensional repeatability of the fabrication process was also estimated through measurements of the wavelength selection performance of nominally identical photonic wire Bragg gratings fabricated at intervals over a period of 37 days.

221 citations


Journal ArticleDOI
Ning Hu1, Zen Masuda1, Go Yamamoto1, Hisao Fukunaga1, Toshiyuki Hashida1, Jinghao Qiu1 
TL;DR: In this paper, the effects of curing process, mixing speed, mixing time, addition of ethanol, timing of hardener addition, etc., in the fabrication process on the electrical properties of nanocomposites have been investigated.
Abstract: Polymer/carbon nanotubes nanocomposites were fabricated by an in situ polymerization process using multi-wall carbon nanotubes (MWNT) as filler in an epoxy polymer. Effects of curing process, mixing speed, mixing time, addition of ethanol, timing of hardener addition, etc., in the fabrication process on the electrical properties of nanocomposites have been investigated. In the fabrication process, the effective formation of macroscopic conducting network in matrix is most important to enhance the electrical properties of nanocomposites. It was found that the curing temperature and the mixing conditions are key factors in the fabrication process, which influence the formation of conducting network significantly. Therefore, careful design of these factors in the fabrication process is required to achieve high electrical performances of nanocomposites. The experimental percolation threshold of the resultant nanocomposites was around 0.1 wt%. Moreover, a statistical percolation model was built up to numerically investigate the percolation threshold. The experimental electrical conductivity increases from the percolation threshold following a percolation-like power law with the identified critical exponent t as 1.75.

171 citations


Journal ArticleDOI
TL;DR: A general route to fabricate highly ordered arrays of nanoscopic silicon oxide dots and stripes (see figure) from block copolymer thin films is described in this article, where cylindrical microdomains oriented normal and parallel to the surface are used as templates for the fabrication of nanoscale silicon oxide, with polydimethylsiloxane as the inorganic precursor.
Abstract: A general route to fabricate highly ordered arrays of nanoscopic silicon oxide dots and stripes (see figure) from block copolymer thin films is described. Poly(styrene-b-4-vinylpyridine) thin films with cylindrical microdomains oriented normal and parallel to the surface were used as templates for the fabrication of nanoscopic silicon oxide, with polydimethylsiloxane as the inorganic precursor.

170 citations


Journal ArticleDOI
TL;DR: In this paper, a maskless nanostructure fabrication by laser interference lithography (LIL) using Lloyd's mirror interferometer is investigated, where the edge quality is improved by anti-reflective coating (ARC) between the substrate and the photoresist to minimize the interference of vertical standing waves.

166 citations



Journal ArticleDOI
TL;DR: In this paper, the status of the research and development in fabricating metal matrix composites by MIM is reviewed, with a major focus on material systems, fabrication methods, resulting material properties and microstructures.

150 citations


Journal ArticleDOI
10 Mar 2008-Sensors
TL;DR: It is shown that SU-8 cantilevers have a reduced sensitivity to changes in the environmental temperature and pH of the buffer solution and can be functionalised directly with receptor molecules for analyte detection, thereby avoiding gold-thiol chemistry.
Abstract: Here, we present the activities within our research group over the last five yearswith cantilevers fabricated in the polymer SU-8. We believe that SU-8 is an interestingpolymer for fabrication of cantilevers for bio/chemical sensing due to its simple processingand low Young’s modulus. We show examples of different integrated read-out methodsand their characterisation. We also show that SU-8 cantilevers have a reduced sensitivity tochanges in the environmental temperature and pH of the buffer solution. Moreover, weshow that the SU-8 cantilever surface can be functionalised directly with receptormolecules for analyte detection, thereby avoiding gold-thiol chemistry.

Journal ArticleDOI
TL;DR: In this paper, hollow microspheres as sacrificial templates were used to synthesize porous SiC ceramics from carbon-filled polysiloxane using hollow micro spheres.
Abstract: Porous SiC ceramics were synthesized from carbon-filled polysiloxane using hollow microspheres as sacrificial templates. The fabrication process involved three steps: (i) the pyrolysis of polysiloxane at 1100 °C, which leads to the conversion of polysiloxane to silicon oxycarbide (SiOC); (ii) the carbothermal reduction of SiOC and the C mixture at 1450 °C, which converts the mixture to a SiC ceramic; and (iii) liquid-phase sintering of the SiC using Al 2 O 3 –Y 2 O 3 as a sintering additive at 1800–2000 °C. The effects of the sintering temperature and template contents on the microstructure, porosity, mechanical strength and thermal conductivity of the resulting porous SiC ceramics were examined. The typical flexural and compressive strengths of the porous SiC ceramics with ∼40% porosity were ∼60 MPa and ∼240 MPa, respectively. The typical thermal conductivity of the porous SiC ceramics with ∼70% porosity was ∼2 W/m K.

Journal ArticleDOI
TL;DR: This paper presents a way to circumvent problems by trimming using electron beam induced compaction of oxide in silicon on insulator by demonstrating a resonance wavelength red shift 4.91 nm in a silicon ring resonator.
Abstract: Silicon is becoming the preferable platform for future integrated components, mostly due to the mature and reliable fabrication capabilities of electronics industry. Nevertheless, even the most advanced fabrication technologies suffer from non-uniformity on wafer scale and on chip scale, causing variations in the critical dimensions of fabricated components. This is an important issue since photonic circuits, and especially cavities such as ring resonators, are extremely sensitive to these variations. In this paper we present a way to circumvent these problems by trimming using electron beam induced compaction of oxide in silicon on insulator. Volume compaction of the oxide cladding causes both changes in the refractive index and creates strain in the silicon lattice. We demonstrate a resonance wavelength red shift 4.91 nm in a silicon ring resonator.

Journal ArticleDOI
TL;DR: In this article, a low-temperature polycrystalline silicon (LTPS) thin film transistor (TFT) fabrication process on polyimide (PI) layers is presented.
Abstract: In this work we show a new low-temperature polycrystalline silicon (LTPS) thin film transistor (TFT) fabrication process on polyimide (PI) layers. The PI is spun on Si-wafer used as rigid carrier, thus overcoming difficulties in handling flexible freestanding plastic substrates, eliminating the problem of plastic shrinkage with high temperature processing and allowing the use of standard semiconductor equipment. LTPS TFTs are fabricated according to a conventional non self-aligned process, with source/drain contacts formed by deposition of a highly doped Si-layer and patterned by a selective wet-etching. Laser annealing is performed providing simultaneous dopant activation and crystallization of the active layer. The maximum process temperature is kept below 350 °C. After LTPS TFTs fabrication, the PI layer is mechanically released from the rigid carrier, which can be re-used for a new fabrication process. The devices exhibit good electrical characteristics with field effect mobility up to 50 cm 2 /V s. Analysis of electrical stability and characteristics in presence of mechanical stress is also shown.

Journal ArticleDOI
TL;DR: In this paper, a method to create homogenous carbon nanotube dispersions that are stable to slow solvent evaporation and to develop a method that allows films to be released from substrates, purified, and transferred to new substrates is presented.
Abstract: Single-walled carbon nanotubes (SWCNTs) have attracted considerable attention as a result of their remarkable strengths, elasticities, superb electrical properties, and high thermal conductivities. A major application identified for SWCNTs is to function as a coating agent to form transparent electrical conductors, which is a crucial component of many optoelectronic devices such as flat-panel displays and solar cells. When compared with commercially available flexible transparent conductors, carbon nanotube films have several advantages: (i) They have high environmental stability and flexibility. SWCNTs are generally inert to bases, humidity, and high temperatures. (ii) Bending nanotube films shows only small changes in resistance. (iii) SWCNTs have high transmittance in the visible region and the neutral color is an advantage over indium tin oxide (ITO) in display applications. (iv) SWCNT films can be fabricated at low cost by solution coating and printing as opposed to ITO, for which vacuum sputtering is typically required. These features have prompted considerable efforts and innovations directed at creating transparent SWCNT films, including vacuum filtering, drop-casting, and Langmuir–Blodgett deposition. However, it remains a challenge to fabricate high-quality free-standing, conductive, and transparent SWCNT films. To accomplish this goal, we report herein our efforts to create homogenous nanotube dispersions that are stable to slow solvent evaporation and to develop a method that allows films to be released from substrates, purified, and transferred to new substrates. A critical element of our procedure is the formation of homogenous SWCNT dispersions that are highly stable (months to years). Most commercial SWCNTs are ‘‘bundled’’ into van der Waals-induced aggregates. These aggregates can be dispersed to different degrees by ultrasonic treatment, and additives are used to create dispersions in aqueous or organic solutions. However, these suspensions usually have relatively low SWCNT concentrations and some methods require covalent bonds to the nanotube surface. In the latter case, the added defects generally lower the conductance of SWCNTs.

Journal ArticleDOI
TL;DR: This work provides a simple process for the fabrication of nanoscale circular patterns with very narrow line width using a much coarser-scale template, and may facilitate the miniaturization of a variety of microelectronic devices.
Abstract: The formation of well-controlled circular patterns on the nanoscale is important for the fabrication of a range of devices such as sensors, memories, lasers, transistors, and quantum devices. Concentric, smooth ring patterns with tunable dimensions have been formed from a cylinder-forming poly(styrene-b-dimethylsiloxane) (PS-PDMS) diblock copolymer under confinement in shallow circular trenches. The high etch selectivity between PS and PDMS facilitates pattern transfer, illustrated by the fabrication of arrays of ferromagnetic cobalt rings with a density of 1.1 × 109/cm2. The effects of confinement diameter and commensurability on the diameter and period of the concentric rings are analyzed using a free energy model that includes interfacial, strain, and bending energies. This work provides a simple process for the fabrication of nanoscale circular patterns with very narrow line width using a much coarser-scale template, and may facilitate the miniaturization of a variety of microelectronic devices.

Journal ArticleDOI
TL;DR: In this article, a spin-coated liquid polyimide substrate instead of solid polyimides sheet is employed to reduce the thermal cycling and improve the production yield of the temperature sensor array.

Journal ArticleDOI
TL;DR: Micro- and nanofabrication of cavities in the volume of sapphire was performed by femtosecond laser irradiation followed by chemical etching with aqueous solution of HF acid to produce self-organized nanostructures or elliptical microchannels.
Abstract: The fabrication of microchannels and self-assembled nanostructures in the volume of sapphire was performed by femtosecond laser irradiation followed by chemical etching with aqueous solution of HF acid. Depending on the focusing conditions self-organized nanostructures or elliptical microchannels are produced. While the dimensions in two directions are on a micro- respectively nanoscale, feature lengths of up to 1 mm are achieved. This comes out to aspect ratios of more than 1000. This fabrication technique is potentially usable for photonic crystal based integrated optical elements or microfluidic devices for applications in life science, biology or chemistry.

Journal ArticleDOI
01 Oct 2008-Small
TL;DR: It is extremely challenging to fabricate three-dimensional patterned structures, let alone complex structures containing encapsulated objects, on the sub-mm scale, and the parallel fabrication of such struc-tures remains a major challenge that needs to be addressed.
Abstract: Lithography, the workhorse of the microelectronics industry,is routinely used to fabricate micro and nanostructures in ahighly monodisperse manner, with high accuracy and preci-sion. However, one of the central limitationsof this technologyis that it is inherently two-dimensional (2D) as a result of thewafer-based fabrication paradigm. It is extremely challengingto fabricate three-dimensional (3D) patterned structures, letalone complex structures containing encapsulated objects, onthe sub-mm scale. Thus, the parallel fabrication of such struc-tures remains a major challenge that needs to be addressed.Some solutions have emerged that enable sub-mm-scalelithographic fabrication in 3D; these include techniques suchas wafer stacking,

Journal ArticleDOI
TL;DR: In this article, six glasses with different molar ratios of CaO/B2O3/SiO2 (designed as CBS-3, CBS-5 and CBS-6) were prepared and pulverized, and they were sintered at different temperatures to reach maximum densification.

Journal ArticleDOI
TL;DR: In this paper, a scalable fabrication technology for devices based on single quantum dots (QDs) was proposed, which combines site-controlled growth of QDs with an accurate alignment procedure.
Abstract: We report on a scalable fabrication technology for devices based on single quantum dots (QDs) which combines site-controlled growth of QDs with an accurate alignment procedure. Placement of individual QDs and corresponding device structures with a standard deviation of around 50nm from the target position was achieved. The potential of the technology is demonstrated by fabricating arrays of mesas, each containing one QD at a defined position. The presence of single, optically active QDs in the mesas was probed by scanning microphotoluminescence of the mesa arrays.

Journal ArticleDOI
TL;DR: In this paper, a low-temperature zinc oxide nanowire network transistor fabrication on a polymer substrate was demonstrated, which can produce high resolution metal electrode transistors with inorganic semiconductor nanowires active material in a fully maskless sequence.
Abstract: All-solution processed, low-temperature zinc oxide nanowire network transistor fabrication on a polymer substrate was demonstrated. This simple process can produce high resolution metal electrode transistors with inorganic semiconductor nanowire active material in a fully maskless sequence, eliminating the need for lithographic and vacuum processes. The temperature throughout the processing was under 140°C, which will enable further applications to electronics on low-cost, large-area flexible polymer substrates.

Journal ArticleDOI
TL;DR: In this article, a capacitance-voltage study for arrays of vertical InAs nanowires is presented, where metal-oxide-semiconductor (MOS) capacitors are obtained by insulating the wires with a conformal 10nm HfO2 layer and using a top Cr∕Au metallization as one of the capacitor's electrodes.
Abstract: We present a capacitance-voltage study for arrays of vertical InAs nanowires. Metal-oxide-semiconductor (MOS) capacitors are obtained by insulating the nanowires with a conformal 10nm HfO2 layer and using a top Cr∕Au metallization as one of the capacitor’s electrodes. The described fabrication and characterization technique enables a systematic investigation of the carrier density in the nanowires as well as of the quality of the MOS interface.

Journal ArticleDOI
TL;DR: This work reports the parallel fabrication of single-electron devices, which results in multiple, individually addressable, single-Electron devices that operate at room temperature that are made possible using CMOS fabrication technology and implementing self-alignment of the source and drain electrodes.
Abstract: Single-electron devices offer many advantages over traditional devices, but it is a challenge to fabricate them in large numbers. A novel geometry in which the source and drain electrodes are vertically separated by thin dielectric films, and nanoparticles attached to the sidewall of the dielectric films act as Coulomb islands, can now be used for the CMOS-compatible fabrication of single-electron devices that operate at room temperature.

Journal ArticleDOI
TL;DR: This work fabricates periodic arrays of deep nanopores with high aspect ratios in crystalline silicon with potential applications in chemical sensors, in the control of liquid wetting of surfaces, and as capacitors in high-frequency electronics and demonstrates by means of optical reflectivity that the high-quality structures are very well suited as photonic crystals.
Abstract: We report on the fabrication of periodic arrays of deep nanopores with high aspect ratios in crystalline silicon. The radii and pitches of the pores were defined in a chromium mask by means of deep UV scan and step technology. The pores were etched with a reactive ion etching process with SF6, optimized for the formation of deep nanopores. We have realized structures with pitches between 440 and 750 nm, pore diameters between 310 and 515 nm, and depth to diameter aspect ratios up to 16. To the best of our knowledge, this is the highest aspect ratio ever reported for arrays of nanopores in silicon made with a reactive ion etching process. Our experimental results show that the etching rate of the nanopores is aspect-ratio-dependent, and is mostly influenced by the angular distribution of the etching ions. Furthermore we show both experimentally and theoretically that, for sub-micrometer structures, reducing the sidewall erosion is the best way to maximize the aspect ratio of the pores. Our structures have potential applications in chemical sensors, in the control of liquid wetting of surfaces, and as capacitors in high-frequency electronics. We demonstrate by means of optical reflectivity that our high-quality structures are very well suited as photonic crystals. Since the process studied is compatible with existing CMOS semiconductor fabrication, it allows for the incorporation of the etched arrays in silicon chips.

Patent
17 Apr 2008
TL;DR: In this article, a continuous film of desired electrical characteristics is obtained by successively printing and annealing two or more dispersions of prefabricated nanoparticles, in order to obtain desired electrical properties.
Abstract: A continuous film of desired electrical characteristics is obtained by successively printing and annealing two or more dispersions of prefabricated nanoparticles.

Journal ArticleDOI
TL;DR: A facile solution-based synthetic route for the fabrication of two different types of novel Co3O4/ZnO nanowire heterostructures: tip-coated array type and fully coated horizontal (or colloidal) type as mentioned in this paper.
Abstract: We developed a facile solution-based synthetic route for the fabrication of two different types of novel Co3O4/ZnO nanowire heterostructures: tip-coated array type and fully coated horizontal (or colloidal) type. Two-step solution-based methods were used for the fabrication of the Co3O4/ZnO nanowire heterostructures. First, ZnO nanowires were grown by ammonia solution hydrothermal method. Afterward, Co3O4 was coated on the ZnO nanowires using a photochemical reaction. Scanning electron microscopy (SEM) and transmission electron microscopy (TEM) were employed for the observation of the heterostructure morphology. Also, X-ray diffraction (XRD) and X-ray photoelectron spectroscopy (XPS) were used to confirm the crystallinity and composition of the heterostructures. We found that the morphology of the heterostructures strongly depends on the photochemical reaction parameters such as the concentration of the cobalt ion solution, UV irradiation time, and geometrical alignment of the ZnO nanowires. The possible...

Journal ArticleDOI
TL;DR: In this paper, the performance of DPP-and quinacridone-based organic field effect transistors (FETs) was evaluated using latent pigments, which can also be regenerated into their parent pigments by heating at about 200 °C.
Abstract: Organic field-effect transistors (FETs) based on unsubstituted diketopyrrolopyrrole (DPP) or quinacridone (QA) have been fabricated using their solvent-soluble precursors called latent pigments (t-BOC DPP and t-BOC QA) which can also be regenerated into their parent pigments by heating at about 200 °C. The use of latent pigments enables us to fabricate FETs by spin coating, offering a low-cost fabrication process rather than an expensive vacuum technology. The objective of the present investigation is to evaluate the performance of DPP- and QA-based FETs prepared using latent pigments. As a result, field effect mobilities of about 7.19×10-6 and 8.23×10-6 cm2 V-1 s-1 are obtained for FETs based on t-BOC DPP and QA, respectively. These values are almost equivalent to those of FETs prepared by the vacuum deposition of DPP and QA, namely 1.43×10-5 and 1.08×10-5 cm2 V-1 s-1, respectively. The present result leads us to conclude that latent pigment technology is an excellent low-cost process fabricating organic FETs.

Journal ArticleDOI
TL;DR: In this paper, a theoretical and experimental analysis of nano-surface generation in ultra-precision raster milling is presented, where an optimization system is established based on the theoretical models for the optimization of cutting conditions and cutting strategy.
Abstract: The fabrication of high-quality freeform surfaces is based on ultra-precision raster milling, which allows direct machining of the freeform surfaces with sub-micrometric form accuracy and nanometric surface finish. Ultra-precision raster milling is an emerging manufacturing technology for the fabrication of high-precision and high-quality components with a surface roughness of less than 10 nm and a form error of less than 0.2 μm without the need for any additional post-processing. Moreover, the quality of a raster milled surface is based on a proper selection of cutting conditions and cutting strategies. Due to different cutting mechanics, the process factors affecting the surface quality are more complicated, as compared with ultra-precision diamond turning and conventional milling, such as swing distance and step distance. This paper presents a theoretical and experimental analysis of nano-surface generation in ultra-precision raster milling. Theoretical models for the prediction of surface roughness are built. An optimization system is established based on the theoretical models for the optimization of cutting conditions and cutting strategy in ultra-precision raster milling. A series of experiments have conducted and the results show that the theoretical models predict well the trend of the variation of surface roughness under different cutting conditions and cutting strategies.

Journal ArticleDOI
TL;DR: In this paper, the authors developed a protocol to fabricate transparent single wall carbon nanotube (SWCNT) films on polyethylene terephthalate (PET) film via spin coating of SWCNT-dispersion solution in dichloroethane (DCE).
Abstract: The authors developed the protocol to fabricate transparent single wall carbon nanotube (SWCNT) films on polyethylene terephthalate (PET) film via spin coating of SWCNT-dispersion solution in dichloroethane (DCE). As it turned out, preparation of good SWCNT-dispersion solution was essential for making good transparent films with low sheet resistance. The posttreatment with nitric acid was also performed to reduce the sheet resistance of as-prepared films. Our acid-treated SWCNT films showed visible-range transmittance of about 80% at sheet resistance of about 85 Ω/sq.