Showing papers on "Gate driver published in 2015"

Study and Handling Methods of Power IGBT Module Failures in Power Electronic Converter Systems

Abstract: Power electronics plays an important role in a wide range of applications in order to achieve high efficiency and performance. Increasing efforts are being made to improve the reliability of power electronics systems to ensure compliance with more stringent constraints on cost, safety, and availability in different applications. This paper presents an overview of the major failure mechanisms of IGBT modules and their handling methods in power converter systems improving reliability. The major failure mechanisms of IGBT modules are presented first, and methods for predicting lifetime and estimating the junction temperature of IGBT modules are then discussed. Subsequently, different methods for detecting open- and short-circuit faults are presented. Finally, fault-tolerant strategies for improving the reliability of power electronic systems under field operation are explained and compared in terms of performance and cost.

Physics-of-Failure, Condition Monitoring, and Prognostics of Insulated Gate Bipolar Transistor Modules: A Review

Abstract: Recent growth of the insulated gate bipolar transistor (IGBT) module market has been driven largely by the increasing demand for an efficient way to control and distribute power in the field of renewable energy, hybrid/electric vehicles, and industrial equipment. For safety-critical and mission-critical applications, the reliability of IGBT modules is still a concern. Understanding the physics-of-failure of IGBT modules has been critical to the development of effective condition monitoring (CM) techniques as well as reliable prognostic methods. This review paper attempts to summarize past developments and recent advances in the area of CM and prognostics for IGBT modules. The improvement in material, fabrication, and structure is described. The CM techniques and prognostic methods proposed in the literature are presented. This paper concludes with recommendations for future research topics in the CM and prognostics areas.

Gate Oxide Reliability Issues of SiC MOSFETs Under Short-Circuit Operation

Abstract: Silicon-Carbide (SiC) MOSFETs, due to material properties, are designed with smaller thickness in the gate oxide and a higher electric field compared to Si MOSFETs. Consequently, the SiC MOSFETs have a worse reliability which causes higher leakage currents during instantaneous abnormal operating conditions. This paper investigates the reliability issues of the SiC MOSFET gate oxide under standard short-circuit test conditions. In this paper, 1200-V SiC MOSFETs are newly modeled, and also their short-circuit sustainability (tolerance) have been studied at different drain-source and gate-source voltages. A hardware tester circuit was designed and developed to test the devices under such extreme circuit conditions. Then, the gate reliability of SiC MOSFET devices have been compared to that of Si power devices of similar ratings. The results reveal a higher reduction in the instantaneous gate-source voltage of SiC MOSFETs compared to that of Si devices under the same operating conditions. The gate-voltage reduction phenomenon results from the higher leakage currents through the gate. Furthermore, it was found that the gate-source voltage reduction during the test depends on the gate structures. The gate voltage reduction of SiC MOSFETs with planar gate is higher than that of MOSFETs with shield planar gate. As the pulse duration increases in short-circuit tests, the leakage current in the gate-source of SiC devices increases. The results show that even though the SiC MOSFETs are very capable of processing long pulses and high power in the drain-source, the gate-source side is highly degraded by these pulses in the test. Moreover, whenever a small number of the short-circuit tests are applied, the gate structure of SiC MOSFETs becomes broken while the drain-source is still able to block the dc-link voltage. The paper concludes that the short-circuit reliability of the gate was found to be worse compared with commercial Si devices with similar rating.

Closed-Loop di/dt and dv/dt IGBT Gate Driver

Abstract: This paper proposes a new concept for attaining a defined switching behavior of insulated-gate bipolar transistors (IGBTs) at inductive load (hard) switching, which is a key prerequisite for optimizing the switching behavior in terms of switching losses and electromagnetic interference (EMI). First, state-of-theart gate driver concepts that enable a control of the IGBT’s switching transients are reviewed. Thereafter, a highly dynamic closedloop IGBT gate driver using simple passive diC /dt and dvCE /dt feedbacks and employing a single analog PI-controller is proposed. Contrary to conventional passive gate drivers, this concept enables an individual control of the current and voltage slopes largely independent of the specific parameters or nonlinearities of the IGBT. Accordingly, a means for optimizing the tradeoff between switching losses, switching delay times, reverse recovery current of the freewheeling diode, turn-off overvoltage, and EMI is gained. The operating principle of the new gate driver is described and based on derived control oriented models of the IGBT, a stability analysis of the closed-loop control is carried out for different IGBT modules. Finally, the proposed concept is experimentally verified for different IGBT modules and compared to a conventional resistive gate driver.

Display device and driving method thereof

Abstract: A disclosed display device includes a display panel with data lines and gate lines, the gate lines including odd-numbered gate lines and even-numbered gate lines The display device also includes a timing controller to generate a gate output enable signal, and a gate output enable signal division circuit to extract odd-numbered high logic periods of the gate output enable signal to output a first gate output enable signal and to extract even-numbered high logic periods of the gate output enable signal to output a second gate output enable signal The display device further includes a gate driver to supply a first gate pulse to an odd-numbered gate line in response to the first gate output enable signal and a second gate pulse to an even-numbered gate line in response to the second output enable signal

Fault Detection for IGBT Using Adaptive Thresholds During the Turn-on Transient

Abstract: This paper presents the analysis and design of an electronic failure detection system applied to the insulated gate bipolar transistor (IGBT), this proposal is based on the direct measurement of behavior of the gate signal during the turn-on transient. The failures by short-circuit and open-circuit devices only are considered in this paper. To achieve early detection, the IGBT gate signal behavior during turn-on transient is used and to increase the effectiveness of the detection and to tolerate the variations of input to system, adaptable thresholds have been added to the analog electronics circuit implemented. The experimental tests are presented in order to validate the proposed fault-detection technique.

An Innovative Scheme of Symmetric Multilevel Voltage Source Inverter With Lower Number of Circuit Devices

Abstract: In this paper, an advanced configuration for a symmetric multilevel voltage source inverter is proposed. The authority of the proposed inverter versus the conventional cascaded H-bridge inverter and those most recently introduced is verified with provided comparisons. The proposed inverter is able to generate the desired voltage levels using a lower number of circuit devices, including power semiconductor switches and related gate driver circuits of switches. As a result, the total cost is considerably reduced, and the control scheme gets simpler. Moreover, the reduced amount of on-state switches in the suggested configuration decreases voltage drops. Furthermore, power losses are diminished. The given simulation results confirm the feasibility of the proposed configuration. To approve the practicability of the proposed inverter, a prototype of the proposed topology has been implemented. Finally, simulation and experimental results are compared, and the provided comparison shows that the obtained results are in good agreement.

Characterization of a Silicon IGBT and Silicon Carbide MOSFET Cross-Switch Hybrid

Abstract: A parallel arrangement of a silicon (Si) IGBT and a silicon carbide (SiC) MOSFET is experimentally demonstrated. The concept referred to as the cross-switch (XS) hybrid aims to reach optimum power device performance by providing low static and dynamic losses while improving the overall electrical and thermal properties due to the combination of both the bipolar Si IGBT and unipolar SiC MOSFET characteristics. For the purpose of demonstrating the XS hybrid, the parallel configuration is implemented experimentally in a single package for devices rated at 1200 V. Test results are obtained to validate this approach with respect to the static and dynamic performance when compared to a full Si IGBT and a full SiC MOSFET reference devices having the same power ratings as for the XS hybrid samples.

Closed-Loop d ${\bm i}/$ d ${\bm t}$ and d ${\bm v}/$ d ${\bm t}$ IGBT Gate Driver

Abstract: This paper proposes a new concept for attaining a defined switching behavior of insulated-gate bipolar transistors (IGBTs) at inductive load (hard) switching, which is a key prerequisite for optimizing the switching behavior in terms of switching losses and electromagnetic interference (EMI). First, state-of-the-art gate driver concepts that enable a control of the IGBT's switching transients are reviewed. Thereafter, a highly dynamic closed-loop IGBT gate driver using simple passive ${\rm d}i_{\rm C}/{\rm d}t$ and ${\rm d}v_{\rm CE}/{\rm d}t$ feedbacks and employing a single analog PI-controller is proposed. Contrary to conventional passive gate drivers, this concept enables an individual control of the current and voltage slopes largely independent of the specific parameters or nonlinearities of the IGBT. Accordingly, a means for optimizing the tradeoff between switching losses, switching delay times, reverse recovery current of the freewheeling diode, turn-off overvoltage, and EMI is gained. The operating principle of the new gate driver is described and based on derived control oriented models of the IGBT, a stability analysis of the closed-loop control is carried out for different IGBT modules. Finally, the proposed concept is experimentally verified for different IGBT modules and compared to a conventional resistive gate driver.

A High Temperature Silicon Carbide mosfet Power Module With Integrated Silicon-On-Insulator-Based Gate Drive

Abstract: This paper presents a board-level integrated silicon carbide (SiC) mosfet power module for high temperature and high power density application. Specifically, a silicon-on-insulator (SOI)-based gate driver capable of operating at 200 °C ambient temperature is designed and fabricated. The sourcing and sinking current capability of the gate driver are tested under various ambient temperatures. Also, a 1200 V/100 A SiC mosfet phase-leg power module is developed utilizing high temperature packaging technologies. The static characteristics, switching performance, and short-circuit behavior of the fabricated power module are fully evaluated at different temperatures. Moreover, a buck converter prototype composed of the SOI gate driver and SiC power module is built for high temperature continuous operation. The converter is operated at different switching frequencies up to 100 kHz, with its junction temperature monitored by a thermosensitive electrical parameter and compared with thermal simulation results. The experimental results from the continuous operation demonstrate the high temperature capability of the power module at a junction temperature greater than 225 °C.

Dynamic Characterization of Parallel-Connected High-Power IGBT Modules

Abstract: In high-power converter design, insulated gate bipolar transistor (IGBT) modules are often operated in parallel to reach high output currents. Evaluating the electrical and thermal behavior of the parallel IGBTs is crucial for the design and reliable operation of converter systems. This paper investigates the static and dynamic characterization of parallel IGBTs and the influence of the electrical parameters on the IGBT behavior. Si-based IGBT power modules with voltage rating of 4.5 kV and current rating of 1 kA are used for the experimental evaluation of module parallel connections. Parallel-connected modules have been driven by several commercial IGBT gate units at various dc-link voltages and current levels and with different temperatures. The tested IGBT gate units show good current sharing performance between the two parallel modules. Other important influencing factors such as busbar design layout, stray inductance variation, and gate driving are also investigated for parallel connections of IGBT modules. Finally, the switching energy of the parallel modules is extracted for IGBTs and diodes under different conditions.

Symmetric and asymmetric transformer based cascaded multilevel inverter with minimum number of components

Abstract: In this study, a novel transformer based cascaded multilevel inverter is presented. The proposed inverter can operate in both symmetric and asymmetric topologies. The presented inverter benefits from the advantages such as reduced number of power switches and reduced total peak inverse voltage of the switching components. The numbers of insulated gate driver circuits are also decreased with respect to the power switches. Furthermore, the presented topology requires just a single DC source. In addition, the numbers of on-state switches in the current paths are reduced. Therefore the voltage drops across the switches are mitigated and as a result the efficiency of the presented inverter is improved. The mentioned advantages cause the implementation cost to be reduced. The operation of the converter is discussed thoroughly for both symmetric and asymmetric operations. The feasibility of the presented inverter topology is validated using the simulation results. Experimental results under 1.5 kW are also added to justify the theoretical analyses.

SiC Integrated Circuit Control Electronics for High-Temperature Operation

Abstract: This paper is an important step toward the development of complex integrated circuit (IC) control electronics that have to attend to high-temperature environment power applications. We present in premiere a prototype set of essential mixed-signal ICs on SiC capable of controlling power switches and a lateral power MESFET able to operate at high temperatures, all embedded on the same chip. Also, we report for the first time the functionality of standard Si-CMOS topologies on SiC for the master–slave data flip-flop (FF) and data-reset FF digital building blocks designed with MESFETs. Concretely, we present the complete development of SiC-MESFET IC circuitry, able to integrate gate drivers for SiC power devices. This development is based on the mature and stable Tungsten–Schottky interface technology used for the fabrication of stable SiC Schottky diodes for the European Space Agency Mission BepiColombo.

Design of On-Chip Gate Drivers With Power-Efficient High-Speed Level Shifting and Dynamic Timing Control for High-Voltage Synchronous Switching Power Converters

Abstract: Two integrated high-speed gate drivers to enable high-frequency operation of synchronous rectifiers in high-voltage switching power converters are presented in this paper. The first synchronous gate driver for a CMOS power train consists of a capacitively coupled level shifter (CCLS) that offers negligible propagation delays and no static current consumption, and requires only one off-chip capacitor to enable high-side power pMOS driving capability without any external floating supply. The second synchronous gate driver consists of a low-power high-speed dynamically controlled level shifter (DCLS) with a reliability-enhanced error-suppression technique for driving a dual-nMOS power train. In addition, a dynamic timing control (DTC) is developed to generate proper dead time for power FETs in order to enable soft switching operation of the converter under different input voltages for enhancing the converter reliability. The converter power efficiency can be also improved by minimizing both switching and short-circuit power losses under high-input-voltage conditions. Implemented in a 0.5 µm 120 V CMOS process, both proposed CCLS and DCLS have demonstrated to shift up 5 V signal to 100 V and 40 V, respectively, improving the FoM by at least 10 times and 2.9 times compared to respective state-of-the-art level shifters. The DTC circuit enables proper ZVS operation in a synchronous buck converter with the CCLS-based gate driver over a wide input supply range from 40 V to 100 V, providing a converter maximum power-efficiency improvement of 11.5%.

A Novel RCD Level Shifter for Elimination of Spurious Turn-on in the Bridge-Leg Configuration

Abstract: With the increase in the switching speed and power level in the bridge-leg configuration, the spurious triggering pulse in the synchronous switch is prone to exceed the threshold voltage and cause spurious turn-on. Eliminating the spurious turn-on phenomenon plays an important role in preventing excessive switching loss, self-oscillation, and shoot-through in the bridge-leg configuration. A novel resistor-capacitor-diode ( RCD) level shifter is proposed to generate a negative gate voltage so that the spurious triggering pulse can be shifted below the threshold voltage, and thereby, the spurious turn-on can be avoided. The merits of the devised auxiliary circuit lie not merely in that it consists only of passive components and can easily be co-packaged with the existing gate driver, but also in that the negative voltage level is tunable and independent of the duty cycle of the converter. The effectiveness of this circuit has been verified by the experimental results. It is shown that when the spurious turn-on occurs in a bridge-leg configuration, the adoption of the proposed circuit can eliminate the spurious turn-on and reduce the turn-off switching loss by more than 40%.

High speed switching issues of high power rated silicon-carbide devices and the mitigation methods

Abstract: With faster switching speed and much lower conduction and switching losses, Silicon-Carbide (SiC) semiconductor devices are nowadays gaining more favor in power converters applications. 1200 V and 1700 V SiC MOSFETs are commercially available, which enables more efficient and compact design of high power rated converters. However, the high di/dt and dv/dt associated with fast switching as well as the circuit parasitic elements raise various issues. In this paper, a double-pulse characterization fixture is built to test a 1200 V/100 A SiC device, from which the high speed switching issues, including device current and voltage resonances and spikes, gate terminal resonance, cross-talk, gate driver noise, and electromagnetic interference (EMI), are presented. All the switching waveform resonances and their associated parasitic elements are exploited and explained. Results show that due to these issues, the devices are prevented from full utilization of either the safe operation area (SOA) or the maximum switching speed. Finally, the device model considering all the parasitic elements is tested with a soft-switching circuit-resonant DC link converter, showing that the above stated issues are significantly mitigated.

An Adaptive ZVS Full-Bridge DC–DC Converter With Reduced Conduction Losses and Frequency Variation Range

Abstract: This paper presents a description and analysis of a full-bridge converter with a novel passive and robust auxiliary circuit for zero-voltage-switching (ZVS) operation. A generalized time-domain state-space analysis is provided to describe the steady-state behavior of the auxiliary circuit. Complete comparison between the well-known single-inductor auxiliary circuit, and the proposed one is presented. For a similar peak current in the auxiliary branch, needed for ZVS, a minimum of 20% reduction in rms current is achieved to decrease the conduction losses in the power switches and in the auxiliary circuit. Also, 65% reduction in switching frequency variation is obtained. This narrower frequency range reduces the need for very high-frequency operation and the associated gate driver losses as well as the difficulty of electromagnetic interference (EMI) filter design. All the theoretical results are experimentally verified.

Creative design of symmetric multilevel converter to enhance the circuit's performance

Abstract: In this study, a new symmetric multilevel converter is introduced which is commonly suitable for medium-voltage applications and where higher number of output levels is required. The proposed inverter can generate all levels at the output associated with a lower number of circuit devices including switches and related gate driver circuits for each switch compared with the conventional symmetric cascaded converter, semi-cascaded converter and the recently introduced inverters. Owing to the lower number of circuit devices, the total cost and the installation area are reduced. Another advantage of the proposed inverter over the mentioned topologies is the lower number of on-state switches which causes a reduction on power losses. Simulation and experimental results are presented to validate the practicality of the proposed multilevel structure.

Active gate driver for fast switching and cross-talk suppression of SiC devices in a phase-leg configuration

Abstract: This paper presents an active gate driver for Silicon Carbide (SiC) devices to fully utilize their potentials of high switching-speed capability in a phase-leg configuration. Based on the SiC device's intrinsic properties, a gate assist circuit consisting of two auxiliary transistors with two diodes is introduced to actively control the gate voltages and gate loop impedances of both devices in a phase-leg during different switching transients. Compared to a conventional gate driver, the proposed circuit has the capability of increasing the switching speed of the phase-leg power devices, suppressing the cross-talk to below device limits. Based on CREE's 2nd generation 1200-V SiC MOSFETs, the test results demonstrate the effectiveness of this active gate driver under various operating conditions. The switching time decreases by up to 28% during turn-on and 50% during turn-off in the prototype circuit, resulting in up to 31% reduction in switching energy loss. In addition, spurious gate voltages induced by cross-talk are limited within the required range.

3.38 Mhz operation of 1.2kV SiC MOSFET with integrated ultra-fast gate drive

Abstract: With the commercialization of wide bandgap power devices such as SiC MOSFETs and JBS diodes, power electronics converters used in the harsh environments such as hybrid electric vehicles and aerospace attract more and more attentions. The low loss, high temperature and fast switching capabilities are utilized in the converters to improve the power density and efficiency. However, the EMI problem caused by the fast switching is a major constrain for improving switching frequency. For this reason, an integrated SiC module with 1.2kV MOSFET and ultra-fast gate drive circuits is proposed and developed. Two 1.2kV SiC MOSFETs bare dies and two high current gate driver chips are integrated in a compact integrated module package to reduce the parasitic inductance. 0Ω gate resistor therefore can be used in this module to improve the device at maximum speed. Noise free operation of the tested module is verified even under extremely high dV/dt and dI/dt conditions. The ultra-low turn-off loss of the module is being demonstrated. Finally, the integrated module is demonstrated in two megahertz converters: an 800W 1.5MHz synchronous boost converter and a 3.38MHz half bridge inverter. The era for high voltage-megahertz switching has arrived.

30 μm-pitch oxide TFT-based gate driver design for small-size, high-resolution, and narrow-bezel displays

Abstract: We report the design and fabrication of a high-yield, a high-speed, and an ultranarrow gate driver with amorphous-indium - gallium - zinc-oxide thin-film transistors (TFTs). A single stage of the gate driver consists of nine TFTs and one capacitor. For supply voltage (VDD) of 20 V, the gate driver operates with a pulsewidth of 2 μs, which is compatible with a 4k2k display operated at 240 Hz. In addition, the proposed gate driver is ultrasmall in physical size, which is only 30 μm in width (pitch) and 720 μm in length, and thus suitable for small-size, high-resolution, and narrow bezel display.

Integrated SiC MOSFET module with ultra low parasitic inductance for noise free ultra high speed switching

Abstract: A 1200V SiC MOSFET-gate driver integrated half-bridge (HB) module using direct bonded copper (DBC) substrate is designed and fabricated for noise free high frequency operation. The layout of the integrated module is carefully designed to eliminate the EMI problem under high switching speed. Due to the significantly reduced stray inductance, the external gate driver resistance can be chosen as zero to maximize the switching speed and reduce the switching loss. Double pulse switching of the standard TO-247 and the integrated module are tested to verify noise free operation of the module under high dI/dt and dV/dt conditions. A half bridge inverter utilizing the integrated module is tested at 510 kHz, 800V, 46Apk-pk. Experimental results show the proposed integrated module can be applied for ultra-high frequency applications.

SiC MOSFET gate drive design considerations

Abstract: The purpose of this paper is to provide guidance on how to design gate driver circuits for Silicon Carbide (SiC) MOSFETs. There are new commercially available SiC MOSFETs available in discrete and module packages which are much faster and more efficient than their traditional IGBT counterparts. To take full advantage of these benefits we need to understand the requirements for a new breed of gate drivers that are tailored to meet the unique drive and protection characteristics of SiC MOSFETs. Traditional IGBT based fault protection schemes such as desaturation (desat) detection can be implemented with some modifications to protect SiC MOSFETs. However, due to the higher switching speed of the new SiC devices, it is worth another look at all the design and implementation aspects of a good SiC MOSFET gate driver.

Experimental Validation of Normally-On GaN HEMT and Its Gate Drive Circuit

Abstract: Wide-bandgap semiconductors such as silicon carbide (SiC) and gallium nitride (GaN) are promising materials for next-generation power devices. We have fabricated a normally on GaN-based high-electron-mobility transistor (GaN HEMT) for power electronic converters. In this paper, the current collapse phenomena, which are distinctive characteristics of GaN devices, are evaluated in detail for several voltages with two switching frequencies. We also evaluate a gate drive circuit that we previously proposed for the normally on GaN HEMT with a single positive voltage source. We construct and test prototype circuits for a boost-type dc–dc converter and a single-phase full-bridge inverter with a gate drive circuit. The problems to be solved for the normally on GaN HEMT, which has a (static) voltage rating of over 600 V, are clarified on the basis of the experimental results.

Method for driving liquid crystal display panel

Abstract: The invention provides a method for driving a liquid crystal display panel. A time schedule controller supplies TP signals to source driver chips and supplies OE signals to gate driver chips. Each gate driver chip and each source driver are provided with a plurality of channels. It is assumed that each gate driver chip is provided with n channels, the channels on each source driver chip is connected with corresponding gate lines on a liquid crystal display substrate via a web-oriented architecture (WOA)-based routing. A plurality of gate lines on the liquid crystal display substrate, corresponding to the plurality of channels on the gate driver chip, are varied in opening time, or the rising edges of the plurality of gate lines are varied in time, or the output currents of the gate driver chips are varied in amplitude. According to the technical scheme of the invention, through changing the amplitudes of currents input to opened gate lines via the channels of the gate driver chips, the Tab non-uniformity problem can be solved. Meanwhile, the display quality of the liquid crystal display panel is improved. Moreover, the cost of driver integrated chips is lowered.

Gate driver optimization to mitigate shoot-through in high-speed switching SiC half bridge module

Abstract: The high-speed switching of SiC MOSFET allows power converter to operate with higher frequency and lower switching loss. However, it tends to aggravate dv/dt effect due to the impact of parasitic parameters, resulting in shoot-through and high device stress in the half bridge configuration. In this study, a compact and high-speed gate driver is developed and optimized for SiC half bridge module. The impact of various circuit parameters including Miller capacitance, common source inductance, gate resistance and gate inductance is evaluated. The improved gate drivers with additional features are compared and optimized to eliminate shoot-through.

A New Fin p-Body Insulated Gate Bipolar Transistor With Low Miller Capacitance

Abstract: A new fin p-body insulated gate bipolar transistor (Fin-p IGBT) is designed and experimentally demonstrated. The device features wide trenches and spacer gates, which is implemented using a simple and low-cost process. Compared with the conventional floating p-body IGBT, the fabricated Fin-p IGBT is able to achieve remarkable reduction in both Miller capacitance (−60% at $V_{\mathrm {\mathbf {CE}}}$ of 15 V) and gate charge (−46%).

Sensing IGBT junction temperature using gate drive output transient properties

Abstract: Insulated Gate Bipolar Transistor (IGBT) junction temperature sensing is normally achieved with a temperature detector. To optimize accuracy, the temperature detectors are placed very close to the power semiconductor chip or embedded on the power semiconductor die. This is inconvenient for power integration and requires further consideration for high voltage, high current, EMI protection, and the detector's thermal-mechanical stress. This paper presents a non-invasive method that integrates junction temperature sensing into the IGBT gate drive and enables high bandwidth sensing. In order to demonstrate the IGBT junction temperature sensing, an IGBT power module is implemented in an H-bridge, and driven by four push-pull type gate drives. The gate drive switching transient properties are used for IGBT junction temperature estimation. The “gate drive-IGBT” switching properties are modeled to explain the junction-temperature-dependent gate drive output dynamics. A hardware implementation for IGBT junction temperature extraction is provided. Experimental results are compared with circuit Spice model simulation.

Display device and mobile terminal using the same

Abstract: A display device and a mobile terminal include a main display unit and an auxiliary display unit that are driven in a full display mode or an always-on mode. The display device includes a data driver configured to supply a data voltage to the data lines, a first gate driver connected to gate lines of the main display unit, and a second gate driver connected to gate lines of the auxiliary display unit. In the full display mode, at least a portion of the main display unit and the auxiliary display unit display image data. In the always-on mode, at least a portion of the auxiliary display unit displays image data.

Online junction temperature measurement using peak gate current

Abstract: A new method for junction temperature measurement of MOS-gated power semiconductor switches is presented. The measurement method involves detecting the peak voltage over the external gate resistor of an IGBT or MOSFET during turn-on. This voltage is directly proportional to the peak gate current and fluctuates with temperature due to the temperature-dependent resistance of the internal gate resistance. A measurement circuit can be integrated into a gate driver with no disruption to converter operation. The method is immune to dependence on load current, and allows autonomous and high frequency measurements through a measurement circuit directly controlled via the gate signal.