Showing papers on "Junction temperature published in 2009"

Thermal management of 3D IC integration with TSV (through silicon via)

Abstract: Thermal performances of 3D stacked TSV (through silicon via) chips filled with copper are investigated based on heat-transfer CFD (computational fluid dynamic) analyses. Emphases are placed on the determination of (1) empirical equations for the equivalent thermal conductive of chips with various copper-filled TSV diameters, pitches, and aspect ratios, (2) the junction temperature and thermal resistance of 3D stacking of up to 8 TSV chips, and (3) the effect of thickness of the TSV chip on its hot spot temperature. Useful design charts and guidelines are provided for engineering practice convenient.

Measurement of Channel Temperature in GaN High-Electron Mobility Transistors

Abstract: In this paper, a simple and reliable method to estimate the channel temperature of GaN high-electron mobility transistors (HEMTs) is proposed. The technique is based on electrical measurements of performance-related figures of merit (I Dmax and R ON) with a synchronized pulsed I -V setup. As our technique involves only electrical measurement, no special design in device geometry is required, and packaged devices can be measured. We apply this technique to different device structures and validate its sensitivity and robustness.

Using the chip as a temperature sensor — The influence of steep lateral temperature gradients on the V ce (T)-measurement

Abstract: During operation steep lateral temperature gradients evolve in IGBT power semiconductor chips. The influence of these lateral gradients on the measurement of the virtual junction temperature by means of the widely used V CE (T)-method was investigated. In particular we address the question, how the obtained single temperature value is connected to the temperature distribution of the chip. A combination of electrical and thermal measurements together with thermal simulations was performed to understand the implicit averaging mechanisms of the V CE (T)-measurement. It is found that the lateral temperature gradient in the chip results in an inhomogeneous sense current distribution during the measurement. This current distribution is responsible for the formation of the measurement value and its corresponding temperature T∗. A comparison of experimental and simulation results shows that for currently existing IGBTs, T∗ corresponds to the area-weighted average of the chip's active area. The maximum imbalance in sense current density during the V CE (T)-measurement was determined to be 150% and 50% of the average current density for the central and the corner parts of the chip, respectively. Furthermore, the temporal evolution of the temperature profile and its influence on the thermal impedance measurement are discussed. It is shown that the temperature at the chip center evolves with a smaller thermal time constant (i.e. faster evolution) than at the chip corners.

On-line junction temperature measurement of IGBTs based on temperature sensitive electrical parameters

Abstract: This paper deals with a method to derive the junction temperature of an IGBT while the device is in operation. In order to achieve this the gate-emitter voltage, the collector current and the collector-emitter voltage are digitized on the driver board. Due to the fact that material parameters vary with temperature, the waveforms of the switching transients vary with temperature, too. Thus, there is a correlation between the temperature and the switching waveforms. Evaluating temperature sensitive electrical parameters (TSEP), the working temperature of the device can be estimated.

Status and prospects for phosphor-based white LED packaging

Abstract: The status and prospects for high-power, phosphor-based white light-emitting diode (LED) packaging have been presented. A system view for packaging design is proposed to address packaging issues. Four aspects of packaging are reviewed: optical control, thermal management, reliability and cost. Phosphor materials play the most important role in light extraction and color control. The conformal coating method improves the spatial color distribution (SCD) of LEDs. High refractive index (RI) encapsulants with high transmittance and modified surface morphology can enhance light extraction. Multi-phosphor-based packaging can realize the control of correlated color temperature (CCT) with high color rendering index (CRI). Effective thermal management can dissipate heat rapidly and reduce thermal stress caused by the mismatch of the coefficient of thermal expansion (CTE). Chip-on-board (CoB) technology with a multilayer ceramic substrate is the most promising method for high-power LED packaging. Low junction temperature will improve the reliability and provide longer life. Advanced processes, precise fabrication and careful operation are essential for high reliability LEDs. Cost is one of the biggest obstacles for the penetration of white LEDs into the market for general illumination products. Mass production in terms of CoB, system in packaging (SiP), 3D packaging and wafer level packaging (WLP) can reduce the cost significantly, especially when chip cost is lowered by using a large wafer size.

SiC power semiconductors in HEVs: Influence of junction temperature on power density, chip utilization and efficiency

Abstract: With SiC, junction temperatures of power semiconductors of more than 700 _C are theoretically possible due to the low intrinsic charge carrier concentration of SiC. Hence, a lot of research on package configurations for power semiconductor operation above 175 _C is currently carried out, especially within the automotive industry due to the possible high ambient temperatures occurring in hybrid electric vehicles (HEVs). This paper shows, that a higher junction temperature though does not necessarily guarantee a higher utilization of the SiC chips with respect to the current that the device can conduct without overheating. The reason is, that for most power devices the power losses start to increase very rapidly at high junction temperatures while the power that can be dissipated always increases linearly with the junction temperature. The junction temperature, where the device current starts to decrease at, is derived for different SiC chips using measured onstate conduction and switching losses in this paper. This paper furthermore analyzes in detail, how the junction temperature on the one hand is influenced by boundary conditions and on the other hand influences itself the core parameters of a converter such as efficiency, the required chip area (i. e. cost) as well as the volumetric power density and thus forms an additional degree of freedom in the design of a power electronic converter. While calculating the optimum junction temperature and analyzing its impact on the system performance, it is demonstrated, how these results can help to find the best suited power semiconductor device for the particular application. The performance of the calculations is shown on a design applied to a drive inverter for hybrid electric vehicles with normally-off SiC JFETs. Operated close to the optimum junction temperature of the SiC JFETs, it reaches a power density of 51 kW/l for the power modules and the air-cooling system, which is shown to be doubled by increasing chip size and using an advanced power semiconductor package with a lower thermal resistance from junction to ambient than the for this case assumed 1 K/W.

Maximum Junction Temperatures of SiC Power Devices

Abstract: This paper presents a detailed physical analysis on the junction temperatures, thermal stabilities, and thermal runaway effects of self-heating unipolar SiC power devices. Results reveal that the risk of thermal runaway could limit the usable junction temperature of these SiC devices to substantially lower than 200°C, regardless of the device size and the cooling method used.

Thermal analysis and test for single concentrator solar cells

Abstract: A thermal model for concentrator solar cells based on energy conservation principles was designed. Under 400X concentration with no cooling aid, the cell temperature would get up to about 1200℃.Metal plates were used as heat sinks for cooling the system, which remarkably reduce the cell temperature. For a fixed concentration ratio, the cell temperature reduced as the heat sink area increased. In order to keep the cell at a constant temperature, the heat sink area needs to increase linearly as a function of the concentration ratio. GaInP/GaAs/Ge triple-junction solar cells were fabricated to verify the model. A cell temperature of 37℃ was measured when using a heat sink at 400X concentratration.

10-kV SiC MOSFET-Based Boost Converter

Abstract: 10-kV silicon carbide (SiC) MOSFETs are currently being developed by a number of organizations in the U.S. with prospective applications in high-voltage and high-frequency power-electronic systems. The aim of this paper is to demonstrate the high-frequency and high-temperature capability of 10-kV SiC MOSFETs in the application of a dc/dc boost converter. In this study, 10-kV SiC MOSFET and junction barrier Schottky (JBS) diode were characterized and modeled in SPICE. Following this, a dc/dc boost converter based on a 10-kV 10-A MOSFET and a 10-kV 5-A JBS diode was designed and tested under continuous operation for frequencies up to 25 kHz. The boost converter had an output voltage of 4 kV, an output power of 4 kW, and operated with a junction temperature of 174degC for the SiC MOSFET. The fast-switching speed, low losses, and high-temperature operation capability of 10-kV SiC MOSFETs demonstrated in the dc/dc boost converter make them attractive for high-frequency and high-voltage power-conversion applications.

Comparison of switching and conducting performance of SiC-JFET and SiC-BJT with a state of the art IGBT

Abstract: Silicon Carbide (SiC) power semiconductors being actually in development are promising devices for the future. To outline their characteristics the switching and conducting performance of a SiC-JFET and a SiC-BJT are investigated and compared to a state of the art Si-IGBT. The power losses, the switching times and the efforts for the driving circuits are investigated. The focus is put on the influence of the junction temperature on the power losses of the investigated devices. Therefore, 1200 V / 6 A devices have been used. The BJT and JFET show some advantages concerning their total losses and their temperature range.

Self-calibration circuit and method for junction temperature estimation

Abstract: The present invention relates to a calibration circuit, computer program product, and method of calibrating a junction temperature measurement of a semiconductor element, wherein respective forward voltages at junctions of the semiconductor element and a reference temperature sensor are measured, and an absolute ambient temperature is determined by using the reference temperature sensor, and the junction temperature of the semiconductor element is predicted based on the absolute ambient temperature and the measured forward voltages.

Circuit for driving an infrared transmitter LED with temperature compensation

Abstract: Systems and methods to achieve a circuit for driving one or more infrared transmitter LEDs with temperature compensation have been disclosed. In a preferred embodiment of the invention the circuit has been applied for a rain sensing system. The junction temperature of the LED is measured and compensated by adjusting the driver current of a voltage-to-current converter driving the LED. The LED junction temperature is measured by comparing the difference in the forward diode voltage at different current densities. This voltage difference is extracted when switching the drive currents between different constant values. The measurement results are converted to digital values, which are used by a buffered dual ladder resistive DAC structure to adjust the drive current to temperature variations.

High-temperature silicon carbide and silicon on insulator based integrated power modules

Abstract: This paper presents the challenges and results of fabricating a high temperature silicon carbide based integrated power module. The gate driver for the module was integrated into the power package and is rated for an ambient temperature of 250 °C. The power module was tested up to 300 V bus voltage, 160 A peak current, and 250 °C junction temperature.

System and method for reducing temperature variation during burn in

Abstract: Systems and methods for reducing temperature variation during burn-in testing. In one embodiment, power consumed by an integrated circuit under test is measured. An ambient temperature associated with the integrated circuit is measured. A desired junction temperature of the integrated circuit is achieved by adjusting a body bias voltage of the integrated circuit. By controlling temperature of individual integrated circuits, temperature variation during burn-in testing can be reduced.

Temperature estimation of high-power light emitting diode street lamp by a multi-chip analytical solution

Abstract: Light emitting diodes (LEDs) are now widely used in many fields including traffic lights, vehicle backlights and liquid crystal display (LCD) displays because of their long life, good illumination efficiency and low energy consumption. At present, LEDs are increasingly replacing the traditional lighting and are being used in general illumination such as the street lamp. For the high-power LED street lamps, good light extraction is the most important thing, but low junction temperature of the LED modules is also critical for achieving a long lifetime and a high optical efficiency. Actually, there have been many reports about early failures of street lamps, called dead lamps that have been regarded as a barrier in the public and administration acceptance of LED street lamps. Therefore temperature estimation is always a crucial issue for LED product development. A multi-chip spreading thermal resistance model was applied to estimate the temperature distribution of LED street lamp. The experiment was first done to obtain temperatures of several locations in a prototype LED street lamp. Then the multi-chip spreading resistance model was established to calculate the full temperature distribution. Comparison between the model calculation and experimental measurement showed a good agreement, which demonstrates that the present model can be used in engineering design to estimate the temperature distribution of high-power LED street lamps.

System and method for estimating the junction temperature of a light emitting diode

Abstract: A method of estimating the junction temperature of a light emitting diode comprises driving a forward bias current through the diode, the current comprising a square wave which toggles between high and low current values (Ihigh, lIow), the high current value (lhιgh) comprising an LED operation current, and the low current value (IIOW) comprising a non-zero measurement current. The forward bias voltage drop (Vf) is sampled and the forward bias voltage drop (VfIow) is determined at the measurement current (IIOW)- The temperature is derived from the determined forward bias voltage drop.

Reliability issues of SiC power MOSFETs toward high junction temperature operation

Abstract: There still remain a number of reliability problems to be resolved with regard to long-term high junction temperature operation of SiC power devices because at present they simply follow Si-based technology. In this paper, various reliability issues for power DMOS devices on 4H-SiC operated at a junction temperature of more than 200 °C are extensively discussed in terms of five manifest problems and potential treats: (1) interlayer dielectric erosion, (2) Al spearing, (3) Ni2Si contact disappearance, (4) electrode delamination, and (5) gate time-dependent dielectric breakdown. Preventive measures for these issues are proposed, including the use of a Ta/TaN barrier metal, a SiCH barrier dielectric, decarbonised Ni2Si and an ONO gate dielectric, and their effectiveness is experimentally verified. A viable device structure and fabrication process that successfully incorporate these measures are then presented. Finally, a storage life of more than 5380 hours at 300 °C is demonstrated for 1 × 1 mm2 4H-SiC power DMOS devices incorporating selected countermeasures. (© 2009 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

Lighting device with one or more removable heat sink elements

Abstract: A lighting device comprising at least a first light source and at least one heat sink element that is removable, that comprises an first inner region and an first outer region, that is identical in shape to another heat sink element, that is in thermal contact with a trim element, that is stacked, that is in thermal contact with at least a first portion of a first surface of the trim element, that has a cross-sectional area at a first distance from an axis of a trim element that is larger than at a shorter distance, and/or that maintains a junction temperature of a lighting device at or below a recommended junction temperature. Also, a lighting device comprising at least a first light source, a trim element, a driver sub-assembly and a spacer element positioned between the trim element and the driver sub-assembly. Also, methods of dissipating heat.

Comparison of SiC and Si power semiconductor devices to be used in 2.5 kW DC/DC converter

Abstract: With the fast development of silicon carbide (SiC) technology, SiC-based power semiconductor devices have started to complete Si components in transportation applications In this paper, two dc/dc converters for hybrid electric vehicles (HEVs) application are designed and analyzed The losses, efficiency, junction temperature, and the volume and weight of heat sinks of two converters are calculated for a Si and SiC solution for a 25kW dc/dc converter A performance comparison of the parameters mentioned above gives that SiC-based technology shows better performances than Si-based power semiconductor devices in the investigated dc/dc converter system Finally, an economical evaluation shows that the SiC components can cost almost 25 times more in order to have the same total cost as for a Si solution for a 15 years operation

Validation of the porous-medium approach to model interlayer-cooled 3D-chip stacks

Abstract: Interlayer cooling is the only heat removal concept which scales with the number of active tiers in a vertically integrated chip stack. In this work, we numerically and experimentally characterize the performance of a three tier chip stack with a footprint of 1cm2. The implementation of 100µm pitch area array interconnect compatible heat transfer structures results in a maximal junction temperature increase of 54.7K at 1bar pressure drop with water as coolant for 250W/cm2 hot-spot and 50W/cm2 background heat flux. The total power removed was 390W which corresponds to a 3.9kW/cm3 volumetric heat flow.

High temperature power electronics IGBT modules for electrical and hybrid vehicles

Abstract: IGBT are the predominant power semiconductors for high current applications in electrical and hybrid vehicles applications. Applications with low switching frequencies ( 300V) applications favour IGBT in bridge circuit configuration. Due to this characteristic IGBT semiconductors provide better conversion efficiency for applications which utilize higher current densities and increased junction temperatures favour the IGBT. Removing the barrier of maximum junction temperature at 150°C allows a significant increase in power density or simplified cooling. The barrier is set by solder fatigue and wire bond lift off at intermittent operation. New packaging technologies are eliminating the reliability issue and the IGBT integrated modules take advantage of developments in PCB’s and passives. High temperature characteristics of silicon devices, i.e. emitter controlled free wheeling diodes and IGBT with trench and field-stop are considered in these modules. Increasing the junction temperature from TJ=150°C to TJ=200°C would increase switching losses by approximately 10%. Blocking characteristics improved by introducing trench and field-stop-IGBTs, will results in lower leakage current increase with TJ. Therefore 600V- and 1200V-chips losses caused by leakage current will stay below critical limits, even at TJ=200°C. This paper will present the latest developments in the area of IGBT devices used for electronics in electrical and hybrid vehicles.

Emerging lead-free, high-temperature die-attach technology enabled by low-temperature sintering of nanoscale silver pastes

Abstract: A low-temperature joining technology based on silver sintering, which is being implemented in manufacturing of power electronics modules, holds the promise of achieving 5× higher temperature cycling capability, 3× better total module resistance, and chip junction temperature up to 175°C. Because of its RoHS compliance, the technology is also aggressively pursued by the makers of automotive power electronics components. However, a serious drawback of the technology is the use of high quasi-static pressure (> 40 MPa or 400 kg-force per cm2 chip area) necessary to lower the sintering temperature of existing thick-film silver pastes to less than 300°C. In this paper, we describe the die-attach application of a nanoscale silver paste that can be sintered at low temperature without pressure. Mechanical, thermal, and thermo-mechanical properties of the sintered silver joints are reported.

A Method to Estimate the Junction Temperature of Photodetectors Operating at High Photocurrent

Abstract: A method to estimate the junction temperature while operating at high photocurrent levels is presented. The relative responsivity change is measured at high operating current. Using a model for the temperature-dependence of the bandgap, a relation between the relative change in the output power and the internal junction temperature is derived. Good agreement between experimental data and simulations is achieved.

Illumination device and display device

Abstract: An illumination device includes: a light emitting element to be a light source; a light amount detecting means for detecting the amount of light emitted by the light emitting element; a light emitting element drive means for controlling drive current supplied to the light emitting element so that the difference between the light mount detected by the light amount detecting means and a light amount target value becomes small; a junction temperature detecting means for calculating junction temperature of the light emitting element; and a setting means for setting the light amount target value in accordance with the junction temperature detected by the junction temperature detecting means.

Numerical simulation on heat pipe for high power LED multi-chip module packaging

Abstract: Light emitting diode (LED) as the new light source has the advantages of power saving, environment-friendly, long lifetime and no pollution compared with fluorescent and incandescent lights. But the disadvantage of LED is low light lumen that only 10%~20% input power transform into the light, and 80%~90% into the heat. The junction temperature of LED is so high as to induce the lifetime declining rapidly, luminous decay and reliability decreasing. Therefore, the effective thermal management is very important for the LED light system. In this work, a new packaging architecture the system in package (SiP) configuration is used in the high power LED packaging. The light system consists of nine chips that each chip is 1.2W. Copper/water miniature heat pipe (mHP) is chosen to dissipate heat based on the LED packaging structure and the input power of the system. The principles of the heat pipe are investigated to design and select the structure and size of the heat pipe. Capillary limit and boiling limit of the heat pipe are calculated to determine the maximum heat transfer and verify the design of the heat pipe. The heat pipe is seen as the thermal superconductor in axial, which take the place of the process of the phase exchange in the pipe. The axial thermal resistance of mHP estimated by the net of the thermal resistance is 0.15°C/W approximately. The system level heat and temperature distribution are investigated using numerical heat flow models. In this analysis, 3D finite volume model is developed to predict the system temperature with Icepak which is the professional software to analyze the temperature field of electronics. The result shows that the junction temperature of the source is under 70°C at the natural convection which is satisfied with the requirement of the LED working at under 120°C. It shows that the heat pipe is the effective solution for the LED light application dissipation. For the lower junction temperature, three factors including the height, the thickness and the fin numbers of the heat sink, respectively, are considered to be optimized by DOE (design of experiment). With the simulation results of Icepak, the optimal scheme that the lower junction temperature is 56.7°C obtained by the combination of optimization levels.

Efficient and light weight thermoelectric waste heat recovery system

Abstract: One embodiment includes an on-board thermoelectric vehicle system for generating electrical energy using a heated fluid stream, including at least one thermoelectric device having a high temperature junction and a low temperature junction, and a body of high conductivity foam shaped and located to increase heat transfer from the heated fluid stream to the high temperature junction or to increase heat transfer from the low temperature junction of the thermoelectric device.