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Conference

Electrical Design of Advanced Packaging and Systems Symposium 

About: Electrical Design of Advanced Packaging and Systems Symposium is an academic conference. The conference publishes majorly in the area(s): Signal integrity & Equivalent circuit. Over the lifetime, 844 publication(s) have been published by the conference receiving 1943 citation(s).
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Proceedings ArticleDOI
Wei Tang1, Tao Shan1, Xunwang Dang1, Maokun Li1, Fan Yang1, Shenheng Xu1, Ji Wu1 
15 Dec 2017
TL;DR: The feasibility of applying deep learning techniques to solve 2D Poisson's equation is investigated, with a significant reduction in CPU time compared with the traditional solver based on finite difference methods.
Abstract: In this work, we investigated the feasibility of applying deep learning techniques to solve 2D Poisson's equation. A deep convolutional neural network is set up to predict the distribution of electric potential in 2D. With training data generated from a finite difference solver, the strong approximation capability of the deep convolutional neural network allows it to make correct prediction given information of the source and distribution of permittivity. Numerical experiments show that the predication error can reach below one percent, with a significant reduction in CPU time compared with the traditional solver based on finite difference methods.

44 citations


Proceedings ArticleDOI
01 Dec 2011
Abstract: In this paper, three high-gain on-chip antennas are proposed using three different silicon-based technologies in the millimeter-wave/THz frequency range. A modified Vivaldi antenna is first implemented using the micro-fabricated floating process. In the proposed process, the top metal layer is supported by metal vias, separating it from the silicon substrate for low-loss application. The antenna gain of 5.5 dBi is obtained with 78% radiation efficiency. A monopole antenna is subsequently designed using the silicon-benzocyclobutene (Si-BCB) process, with micro-machined backed cavity for high efficiency and wideband application. The simulated gain of this antenna is 6 dBi with 88% radiation efficiency. Our third proposed on-chip antenna is fabricated using commercial 0.18-Hm CMOS technology. The antenna gain and efficiency are improved by the dielectric resonator on the surface of the antenna. The measured gain is 2.7 dBi with radiation efficiency of 43% The three proposed antennas with different silicon compatible processes are therefore suitable for application in the millimeter-wave/THz integrated circuits.

30 citations


Proceedings ArticleDOI
30 Dec 2008
TL;DR: This paper presents the first work on routing with these multi-functional interconnects in 3D: signal, thermal, and power distribution networks and demonstrates how to consider various physical, electrical, and thermo-mechanical requirements to successfully complete routing while addressing various reliability concerns.
Abstract: Heat removal and power delivery are two major reliability concerns in the 3D stacked IC technology. Liquid cooling based on micro-fluidic channels is proposed as a viable solution to dramatically reduce the operating temperature of 3D ICs. In addition, designers use a highly complex hierarchical power distribution network in conjunction with decoupling capacitors to deliver currents. However, these thermal and power/ground interconnects together with those used for signal delivery compete with each other for routing resources including various types of Through-Silicon-Vias (TSVs). This paper presents the first work on routing with these multi-functional interconnects in 3D: signal, thermal, and power distribution networks. We demonstrate how to consider various physical, electrical, and thermo-mechanical requirements of these multi-functional interconnects to successfully complete routing while addressing various reliability concerns.

28 citations


Proceedings ArticleDOI
01 Dec 2010
Abstract: A new hybrid-integrated dual-band filter is proposed for WLAN application, where the lower passband is implemented by a pair of stepped-impedance resonators (SIRs) and the higher passband is provided by two substrate integrated waveguide (SIW) cavities. In our design, the SIRs are embedded into the SIWs to reduce the size. The relationship between the parasitic resonances of SIW structure and the locations of its transmission zeros is studied. Its good performances have been demonstrated by the simulated and measured S-parameters.

20 citations


Proceedings ArticleDOI
01 Dec 2012
Abstract: Graphene nano-ribbons (GNR) have been proposed for building up interconnects for 3-D ICs, due to their superior performance over conventional metallic materials In this paper, signal integrity analyses of single- and multi-layered GNR (SLGNR & MLGNR) interconnects are carried out based on their equivalent circuit models, with crosstalk effects characterized theoretically It is shown that longer length and larger width of the SLGNR interconnect will result in higher crosstalk voltage, but it cannot exceeds its threshold one While for MLGNRs, their advantages over Cu wires are kept even with the worst crosstalk

18 citations


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Performance
Metrics
No. of papers from the Conference in previous years
YearPapers
202037
201944
201845
2017144
2016100
201556