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Institution

International Rectifier

CompanyWrexham, Wales [Cymru GB-CYM], United Kingdom
About: International Rectifier is a company organization based out in Wrexham, Wales [Cymru GB-CYM], United Kingdom. It is known for research contribution in the topics: Power semiconductor device & Transistor. The organization has 767 authors who have published 1624 publications receiving 27118 citations.


Papers
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Patent
04 Mar 2002
TL;DR: In this article, a fully protected H-bridge for a d-c motor consists of two high side MOSFETs and a control and logic IC on a first conductive heat sink all within a first package and two discrete low-side MOSFLETs.
Abstract: A fully protected H-bridge for a d-c motor consists of two high side MOSFETs and a control and logic IC on a first conductive heat sink all within a first package and two discrete low side MOSFETs. The entire bridge is controlled by the IC. Shoot thru protection is provided for each leg, and a PMW soft start sequence is provided through the control of the low side MOSFETs, programed by an external, chargeable RC circuit. Input signals to the high side MOSFETs select the operation modes. Protective circuits are provided for short circuit current and over current conditions. Sleep mode and braking/non braking control is also provided.

11 citations

Patent
10 Dec 2009
TL;DR: In this article, a method for fabricating a III-Nitride transistor on a 3-Nidec semiconductor body was presented, which consists of etching dielectric trenches in a field dielectrics overlying gate, source, and drain regions of the III-NIDEc body, and thereafter forming a gate and a blanket diffusion barrier over the gate and source regions.
Abstract: In one embodiment, a method for fabricating a III-Nitride transistor on a III-Nitride semiconductor body (242) is disclosed. The method comprises etching dielectric trenches in a field dielectric (240) overlying gate, source, and drain regions of the III-Nitride semiconductor body, and thereafter forming a gate dielectric (270) over the gate, source and drain regions. The method further comprises forming a blanket diffusion barrier (272) over the gate dielectric layer, and then removing respective portions of the blanket diffusion barrier from the source and drain regions. Thereafter, gate dielectric is removed from the source and drain regions to substantially expose the source and drain regions. Then, ohmic contacts are formed by depositing contact metal (290) in the source and drain regions. The method results in highly conductive source/drain contacts that are particularly suitable for power transistors, for example, III-Nitride transistors, such as GaN transistors. In another embodiment, a structure for highly conductive source/drain contacts is disclosed.

11 citations

Patent
08 Dec 1982
TL;DR: In this paper, the junctions of a plurality of semiconductor devices are formed in a common wafer, and the upper surface of the common Wafer is metallized for each of the individual devices by a nickel, chromium, nickel, silver metallizing system Individual wafer elements are separated from the main wafer and their bottom surfaces are vacuum-alloyed to a molybdenum expansion plate.
Abstract: The junctions of a plurality of semiconductor devices are formed in a common wafer The upper surface of the common wafer is metallized for each of the individual devices by a nickel, chromium, nickel, silver metallizing system Individual wafer elements are thereafter separated from the main wafer and their bottom surfaces are vacuum-alloyed to a molybdenum expansion plate Thereafter, the outer periphery of the devices is tapered by grinding and the periphery is etched by hot potassium hydroxide without need to protect the upper metallizing from the etch The caustic etch is washed with citric acid Thereafter, the periphery is passivated by a passivation coating

11 citations

Patent
23 Nov 1998
TL;DR: A polysilicon gate is a continuous sheet of closed cells which permits gate current to spread both longitudinally and laterally as mentioned in this paper, and it can be carried out with planar and groove technologies.
Abstract: A MOSgated device has a plurality of rows of closed cells which each have a laterally enlarged central base area having two narrow oppositely extending base stripes. Each cell in the row is spaced from the adjacent cell in the row, and each cell of one row is nested into the cells of an opposite row such that its enlarged central region is longitudinally located adjacent the space between the cells of the adjacent row. The polysilicon gate is a continuous sheet and permits gate current to spread both longitudinally and laterally. The invention can be carried out with planar and groove technologies.

11 citations

Patent
06 Oct 2008
TL;DR: A ripple regulator for providing a pulse width modulation (PWM) signal for regulating an output voltage of a power converter switching stage was proposed in this paper, where a comparison circuit was used to compare the ripple voltage to an output of an error amplifier.
Abstract: A ripple regulator for providing a pulse width modulation (PWM) signal for regulating an output voltage of a power converter switching stage. The regulator including a ripple circuit for providing a ripple voltage; a comparison circuit for comparing the ripple voltage to an output of an error amplifier; and a PWM circuit producing the PWM signal and receiving an output of the comparison circuit and a clock signal input, the clock signal input determining a first edge of the PWM signal and the output of said comparison circuit determining a second edge of the PWM signal.

11 citations


Authors

Showing all 768 results

NameH-indexPapersCitations
Robert S. Brown130124365822
Praveen Jain5962711528
Edwin L. Piner421625020
Jerry W. Johnson371093522
Steffen Rupp361574848
Kevin J. Linthicum361174334
Andrei Vescan312073308
Thomas Gehrke28812753
Pradeep Rajagopal27652282
Thomas J. Ribarich24831547
Daniel M. Kinzer23822054
Bo Yang21403331
Johan Strydom21752159
Michael A. Briere191421200
Robert Joseph Therrien19561441
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Performance
Metrics
No. of papers from the Institution in previous years
YearPapers
20221
20201
20192
20183
20175
201611