Open AccessBook
Algorithms for VLSI Physical Design Automation
TLDR
This book is a core reference for graduate students and CAD professionals and presents a balance of theory and practice in a intuitive manner.Abstract:
From the Publisher:
This work covers all aspects of physical design. The book is a core reference for graduate students and CAD professionals. For students, concept and algorithms are presented in an intuitive manner. For CAD professionals, the material presents a balance of theory and practice. An extensive bibliography is provided which is useful for finding advanced material on a topic. At the end of each chapter, exercises are provided, which range in complexity from simple to research level.read more
Citations
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Journal ArticleDOI
Recent directions in netlist partitioning: a survey
TL;DR: This survey describes research directions in netlist partitioning during the past two decades in terms of both problem formulations and solution approaches, and discusses methods which combine clustering with existing algorithms (e.g., two-phase partitioning).
Journal ArticleDOI
NoC synthesis flow for customized domain specific multiprocessor systems-on-chip
Davide Bertozzi,A. Jalabert,Srinivasan Murali,R. Tamhankar,Stergios Stergiou,Luca Benini,G. De Micheli +6 more
TL;DR: This work illustrates a complete synthesis flow, called Netchip, for customized NoC architectures, that partitions the development work into major steps (topology mapping, selection, and generation) and provides proper tools for their automatic execution (SUNMAP, xpipescompiler).
Book ChapterDOI
Graphs and Digraphs
TL;DR: For the list object, introduced in Chapter 5, it was shown that each data element contains at most one predecessor element and one successor element, so for any given data element or node in the list structure, the authors can talk in terms of a next element and a previous element.
Book ChapterDOI
Spanning Trees and Spanners
TL;DR: This work surveys results in geometric network design theory, including algorithms for constructing minimum spanning trees and low-dilation graphs.
Proceedings ArticleDOI
SUNMAP: a tool for automatic topology selection and generation for NoCs
Srinivasan Murali,G. De Micheli +1 more
TL;DR: SUNMAP automates NoC selection and generation, bridging an important design gap in building NoCs and explores various design objectives such as minimizing average communication delay, area, power dissipation subject to bandwidth and area constraints.
References
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Journal ArticleDOI
Single-Layer Routing for VLSI: Analysis and Algorithms
TL;DR: A program which implements the proposed algorithms for routing nets inside an arbitrarily shaped region has been written and tested and the results from this program are shown as examples.
Proceedings ArticleDOI
A CAD system for the design of field programmable gate arrays
TL;DR: This paper describes the software necessary to support two distinct but closely related aspects of them: the development of a new FPGA architecture, and the use of FPGAs from an application viewpoint.
Proceedings ArticleDOI
Unification of budgeting and placement
TL;DR: A novel formulation for thenet-based timing-driven placement problem that performs budgeting (net delay upper bounds) and placement modification simultaneously thus alleviates the problem of going back-and-forth between budgeting and placement.
Proceedings ArticleDOI
Near-optimaln-layer channel routing
R. J. Enbody,H. C. Du +1 more
TL;DR: Two n-layer channel routing algorithms that guarantee successful routing of the channel for n greater than three are presented and one is linear and optimal given a VHV...HV assignment of layers and the other is quasilinear and performs optimally on examples from the literature.
Journal ArticleDOI
On the solution of inequality systems relevant to IC-layout
TL;DR: The results show that CAD systems manipulating merely the geometry of the layout without changing its topology can be efficiently implemented, however, systems that are also able to change the topology of the layouts have to solve hard, i.e., NP-complete, problems.