Journal ArticleDOI
Design, Simulation, and Work Function Trade for DC and Analog/RF Performance Enhancement in Dual Material Hetero Dielectric Double Gate Tunnel FET
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This article is published in Silicon.The article was published on 2022-02-19. It has received 6 citations till now. The article focuses on the topics: Gate dielectric & Work function.read more
Citations
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Journal ArticleDOI
Partially Extended Germanium Source DG-TFET: Design, Analysis, and Optimization for Enhanced Digital and Analog/RF Parameters
Proceedings ArticleDOI
Design and analysis of a source pocket dual material hetero dielectric double gate TFET for improved performance
TL;DR: In this paper , a source pocket dual material hetero dielectric double gate (SPDMHDDG) TFET structure is proposed to improve tunneling current, where an InGaAs material is used as a pocket in the source region near channel region to enhance the tunneling currents.
Journal ArticleDOI
Analysis and Mitigation of Negative Differential Resistance effects in Double-Gate Silicon-on-Insulator Negative Capacitance Field Effect Transistor with improved analog performance
TL;DR: In this paper , the authors examined the root cause of NDR as being the FE layer with a small number of strongly coupled domains, which allows the drain to lower the surface potential (ΨSs) and internal gate voltage (Vint) on the source side.
Proceedings ArticleDOI
Design and analysis of a source pocket dual material hetero dielectric double gate TFET for improved performance
TL;DR: In this paper , a source pocket dual material hetero dielectric double gate (SPDMHDDG) TFET structure is proposed to improve tunneling current, where an InGaAs material is used as a pocket in the source region near channel region to enhance the tunneling currents.
Proceedings ArticleDOI
Performace Improvement of TFET using Gate drain overlap structure with hetrojunction
TL;DR: In this paper , the performance of DMDG-TFET with Si source and with heterojunction formed by Ge source is compared and analyzes the performance parameters such as drain current(ID), subthreshold swing(SS), current switching ratio(ION/IOFF), am- bipolar current, capacitance, transconductance and intrinsic delay of the TFET device.
References
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Journal ArticleDOI
Tunnel field-effect transistors as energy-efficient electronic switches
Adrian M. Ionescu,Heike Riel +1 more
TL;DR: Tunnels based on ultrathin semiconducting films or nanowires could achieve a 100-fold power reduction over complementary metal–oxide–semiconductor transistors, so integrating tunnel FETs with CMOS technology could improve low-power integrated circuits.
Journal ArticleDOI
Leakage current mechanisms and leakage reduction techniques in deep-submicrometer CMOS circuits
TL;DR: Channel engineering techniques including retrograde well and halo doping are explained as means to manage short-channel effects for continuous scaling of CMOS devices and different circuit techniques to reduce the leakage power consumption are explored.
Journal ArticleDOI
Nanowire transistors without junctions
Jean-Pierre Colinge,Chi-Woo Lee,Aryan Afzalian,Aryan Afzalian,Nima Dehdashti Akhavan,Ran Yan,Isabelle Ferain,Pedram Razavi,B. O'Neill,Alan Blake,Mary White,Anne-Marie Kelleher,Brendan McCarthy,Richard Murphy +13 more
TL;DR: A new type of transistor in which there are no junctions and no doping concentration gradients is proposed and demonstrated, which has near-ideal subthreshold slope, extremely low leakage currents, and less degradation of mobility with gate voltage and temperature than classical transistors.
Journal ArticleDOI
Complementary tunneling transistor for low power application
Peng-Fei Wang,K. Hilsenbeck,Th. Nirschl,M. Oswald,Ch. Stepper,M. Weis,Doris Schmitt-Landsiedel,Walter Hansch +7 more
TL;DR: In this paper, the complementary Si-based tunneling transistors are investigated in detail, and it is found that the band-to-band tunneling current is controlled by the gate-tosource voltage.
Journal ArticleDOI
Hetero-Gate-Dielectric Tunneling Field-Effect Transistors
Woo Young Choi,Woojun Lee +1 more
TL;DR: In this article, the authors proposed a hetero-gate-dielectric TFET, which enhances on-current, suppresses ambipolar behavior, and makes abrupt on-off transition by replacing the source-side gate insulator with a high-k material, which induces a local minimum of the conduction band edge at the tunneling junction.