Journal ArticleDOI
Distributed In-Memory Computing on Binary RRAM Crossbar
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TLDR
Based on numerical results for fingerprint matching that is mapped on the proposed RRAM-crossbar, the proposed architecture has shown 2.86x faster speed, 154x better energy efficiency, and 100x smaller area when compared to the same design by CMOS-based ASIC.Abstract:
The recently emerging resistive random-access memory (RRAM) can provide nonvolatile memory storage but also intrinsic computing for matrix-vector multiplication, which is ideal for the low-power and high-throughput data analytics accelerator performed in memory. However, the existing RRAM crossbar--based computing is mainly assumed as a multilevel analog computing, whose result is sensitive to process nonuniformity as well as additional overhead from AD-conversion and I/O. In this article, we explore the matrix-vector multiplication accelerator on a binary RRAM crossbar with adaptive 1-bit-comparator--based parallel conversion. Moreover, a distributed in-memory computing architecture is also developed with the according control protocol. Both memory array and logic accelerator are implemented on the binary RRAM crossbar, where the logic-memory pair can be distributed with the control bus protocol. Experimental results have shown that compared to the analog RRAM crossbar, the proposed binary RRAM crossbar can achieve significant area savings with better calculation accuracy. Moreover, significant speedup can be achieved for matrix-vector multiplication in neural network--based machine learning such that the overall training and testing time can be both reduced. In addition, large energy savings can be also achieved when compared to the traditional CMOS-based out-of-memory computing architecture.read more
Citations
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A 64-Tile 2.4-Mb In-Memory-Computing CNN Accelerator Employing Charge-Domain Compute
TL;DR: This paper addresses data movement via an in-memory-computing accelerator that employs charged-domain mixed-signal operation for enhancing compute SNR and, thus, scalability in large-scale matrix-vector multiplications.
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In-memory Learning with Analog Resistive Switching Memory: A Review and Perspective
Yue Xi,Bin Gao,Jianshi Tang,An Chen,Meng-Fan Chang,Xiaobo Sharon Hu,Jan Van der Spiegel,He Qian,Huaqiang Wu +8 more
TL;DR: This article defines the main figures of merit (FoMs) of analog RSM hardware including the basic device characteristics, hardware algorithms, and the corresponding mapping methods for device arrays, as well as the architecture and circuit design considerations for neural networks.
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Analog architectures for neural network acceleration based on non-volatile memory
TL;DR: This work explores and consolidates the various approaches that have been proposed to address the critical challenges faced by analog accelerators, for both neural network inference and training, and highlights the key design trade-offs underlying these techniques.
Proceedings ArticleDOI
Computing with ferroelectric FETs: Devices, models, systems, and applications
Ahmedullah Aziz,Evelyn T. Breyer,An Chen,Xiaoming Chen,Suman Datta,Sumeet Kumar Gupta,Michael J. Hoffmann,Xiaobo Sharon Hu,Adrian M. Ionescu,Matthew Jerry,Thomas Mikolajick,Halid Mulaosmanovic,Kai Ni,Michael Niemier,Ian O'Connor,Atanu K. Saha,Stefan Slesazeck,Sandeep Krishna Thirumala,Xunzhao Yin +18 more
TL;DR: Transistors with integrated ferroelectrics with device-level characteristics offer unique opportunities at the circuit, architectural, and system-level, and are considered here from device, circuit/architecture, and foundry-level perspectives.
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Neuromorphic Spiking Neural Networks and Their Memristor-CMOS Hardware Implementations
TL;DR: In this paper, hybrid memristor-CMOS approaches have been proposed to implement large-scale neural networks with learning capabilities, offering a scalable and lower-cost alternative to existing CMOS systems.
References
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TL;DR: In this paper, the authors review the recent progress in the resistive random access memory (ReRAM) technology, one of the most promising emerging nonvolatile memories, in which both electronic and electrochemical effects play important roles in the non-volatile functionalities.
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Proceedings ArticleDOI
Low power and high speed bipolar switching with a thin reactive Ti buffer layer in robust HfO2 based RRAM
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Klaus-Robert Müller,Michael Tangermann,Guido Dornhege,Matthias Krauledat,Gabriel Curio,Benjamin Blankertz +5 more
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