Journal ArticleDOI
Improvement of $V_{\rm th}$ Instability in Normally-Off GaN MIS-HEMTs Employing ${\rm PEALD}\hbox{-}{\rm SiN}_{\rm x}$ as an Interfacial Layer
Reads0
Chats0
TLDR
In this paper, a plasma enhanced atomic layer deposition technique was successfully employed for very thin SiNx (5 nm) as an interfacial layer to reduce the threshold voltage instability in gate recessed normally-off GaN metal insulator semiconductor high electron mobility transistors with SiNix gate insulator.Abstract:
In this letter, reduction of threshold voltage instability in gate recessed normally-off GaN metal insulator semiconductor high electron mobility transistors with SiNx gate insulator was investigated. A plasma enhanced atomic layer deposition technique was successfully employed for very thin SiNx (5 nm) as an interfacial layer. The hysteresis and drift of threshold voltage in transfer curve and the forward biased gate leakage current were effectively reduced.read more
Citations
More filters
Journal ArticleDOI
Negative Bias-Induced Threshold Voltage Instability in GaN-on-Si Power HEMTs
Matteo Meneghini,Isabella Rossetto,Davide Bisi,Maria Ruzzarin,Marleen Van Hove,Steve Stoffels,Tian-Li Wu,Denis Marcon,Stefaan Decoutere,Gaudenzio Meneghesso,Enrico Zanoni +10 more
TL;DR: In this paper, the negative threshold voltage instability in GaN-on-Si metal-insulator-semiconductor high electron mobility transistors with partially recessed AlGaN was investigated.
Journal ArticleDOI
Comprehensive Study of the Complex Dynamics of Forward Bias-Induced Threshold Voltage Drifts in GaN Based MIS-HEMTs by Stress/Recovery Experiments
TL;DR: In this article, the transient recovery characteristics of GaN-based HEMTs with a SiO2 gate dielectric induced by forward gate bias stress are systematically and comprehensively investigated for stress times from 100 ns to 10 ks, recovery times from 4 μs to 10ks, and stress biases from 1 to 7 V.
Journal ArticleDOI
Al 2 O 3 /AlN/GaN MOS-Channel-HEMTs With an AlN Interfacial Layer
TL;DR: In this article, a monocrystalline AlN interfacial layer is inserted between the amorphous Al�Ω 2�O� 3cffff gate dielectric and the GaN channel to prevent the formation of detrimental Ga-O bonds.
Journal ArticleDOI
High-Voltage and Low-Leakage-Current Gate Recessed Normally-Off GaN MIS-HEMTs With Dual Gate Insulator Employing PEALD- ${\rm SiN}_{x}$ /RF-Sputtered- ${\rm HfO}_{2}$
TL;DR: In this article, a SiNx/HfO2 dual gate insulator was used to fabricate gate recessed normally-off AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors, which achieved excellent characteristics such as large threshold voltage of 1.65 V, high breakdown voltage of 900 V, extremely small off-state drain leakage current less than 10-9 A/mm and high ON/OFF drain current ratio of ~ 109, low on-state resistance of 2.84 mΩ·cm2, and
Interface Characterization of Normally-Off Al2O3/AlN/GaN MOS-Channel-HEMTs with an AlN Interfacial Layer
TL;DR: In this paper, a high performance normally off Al2O3/AlN/GaN MOS-channel high electron mobility transistor (MOSC-HEMT) featuring a monocrystalline AlN interfacial layer inserted between the amorphous Al 2O3 gate dielectric and the GaN channel is presented.
References
More filters
Journal ArticleDOI
Band offsets of high K gate oxides on III-V semiconductors
John Robertson,B. Falabretti +1 more
TL;DR: In this article, the band offsets of various gate dielectrics including HfO2, Al2O3, Gd2O 3, Si3N4, and SiO2 on III-V semiconductors such as GaAs, InAs, GaSb, and GaN have been calculated using the method of charge neutrality levels.
Journal ArticleDOI
AlGaN/GaN Recessed MIS-Gate HFET With High-Threshold-Voltage Normally-Off Operation for Power Electronics Applications
T. Oka,Tomohiro Nozawa +1 more
TL;DR: In this article, the GaN-based recessed MIS-gate structure in conjunction with negative polarization charges under the gate allows the high threshold voltage, whereas the low on-state resistance is maintained by the 2D electron gas remaining in the channel except for the recessed gate region.
Journal ArticleDOI
1200-V Normally Off GaN-on-Si Field-Effect Transistors With Low Dynamic on -Resistance
Rongming Chu,Andrea Corrion,M. Chen,Ray Li,D. Wong,Daniel Zehnder,Brian Hughes,Karim S. Boutros +7 more
TL;DR: In this paper, high-voltage GaN field-effect transistors fabricated on Si substrates were reported to have high breakdown voltage of 1200 V and low dynamic on-resistance at highvoltage operation.
Journal ArticleDOI
Plasma enhanced atomic layer deposition of SiNx:H and SiO2
TL;DR: In this article, the authors present results for a hybrid technique, plasma enhanced atomic layer deposition (PEALD), which utilizes typical PECVD process gases and tooling while delivering improved topography coverage and thickness control.
Journal ArticleDOI
Tri-Gate Normally-Off GaN Power MISFET
TL;DR: The tri-gate normally-off GaN on-Si field effect transistor (MISFET) was proposed in this paper, achieving a breakdown voltage of 565 V at a drain leakage current of 0.6 μA/mm and Vgs = 0.80 ± 0.06 V.
Related Papers (5)
AlGaN/GaN Recessed MIS-Gate HFET With High-Threshold-Voltage Normally-Off Operation for Power Electronics Applications
T. Oka,Tomohiro Nozawa +1 more