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Proceedings ArticleDOI

Non-poissonian behavior of hot carrier degradation induced variability in MOSFETs

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TLDR
New experimental findings about the variability of the MOSFET threshold voltage (VT) introduced by hot carrier (HC) degradation are reported and a new physical model able to explain these phenomena is proposed and validated with numerical simulations.
Abstract
This paper reports new experimental findings about the variability of the MOSFET threshold voltage (V T ) introduced by hot carrier (HC) degradation. Previously, it was reported that the V t shift due to HC stress (ΔV t ) follows a Poissonian behavior, i.e. the standard deviation of ΔV t distribution is proportional to the square root of its mean value. Here, we show data coming from very different devices over a wide range of stress levels that deviates from the poissonian behavior under two particular conditions. First, in the initial stage of the HC stress ΔV t may exhibit a super-poissonian behavior, i.e. its standard deviation is related to the mean value yet by a power law but with an exponent larger than 0.5, that will then tend to the square root dependence as the stress continues. Second, and most notably, for very high stress levels ΔV t standard deviation tends to saturate to a maximum value, or even decrease in some cases, although HC degradation keeps increasing. A new physical model able to explain these phenomena is proposed and validated with numerical simulations. Quantitative agreement of statistical simulation with experimental data, hence predictive capability of the model, could be attained only by considering a realistic 3D geometry and the atomistic nature of both channel doping and HC induced trapped charge.

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Citations
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Journal ArticleDOI

On the Trap Locations in Bulk FinFETs After Hot Carrier Degradation (HCD)

TL;DR: In this article, the typical locations of the interface and oxide traps generated by the hot carrier degradation (HCD) in FinFETs are studied with experiments and "atomistic" TCAD simulations under the worst case stress conditions.
Journal ArticleDOI

Hot Carrier Degradation-Induced Dynamic Variability in FinFETs: Experiments and Modeling

TL;DR: In this paper, the dynamic variability induced by hot carrier degradation (HCD) in FinFETs with decomposing the variation contributions of multiple types of traps is studied with a circuit simulation.
Proceedings ArticleDOI

Modeling the Effect of Random Dopants on Hot-Carrier Degradation in FinFETs

TL;DR: The statistical analysis of HCD performed over an ensemble of 200 transistors with different random dopant configurations shows that degradation traces and device lifetimes have quite broad distributions and that the deterministic model tends to overestimate HCD and makes pessimistic predictions on device lifetime.
Journal ArticleDOI

Stochastic Modeling of the Impact of Random Dopants on Hot-Carrier Degradation in n-FinFETs

TL;DR: In this article, the impact of random dopants (RDs) on the hot-carrier degradation (HCD) in n-FinFETs has been investigated using the deterministic version of the HCD model.
References
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Matching properties of MOS transistors

TL;DR: In this paper, the matching properties of the threshold voltage, substrate factor, and current factor of MOS transistors have been analyzed and measured, and the matching results have been verified by measurements and calculations on several basic circuits.
Journal ArticleDOI

Hot-Electron-Induced MOSFET Degradation - Model, Monitor, and Improvement

TL;DR: In this article, it was shown that MOSFET degradation is due to interface states generation by electrons having 3.7 eV and higher energies, and this critical energy and the observed time dependence was explained with a physical model involving the breaking of the = Si/sub s/H bonds.
Journal ArticleDOI

Simulation of intrinsic parameter fluctuations in decananometer and nanometer-scale MOSFETs

TL;DR: In this paper, a review of the analytical and numerical simulation techniques used to study and predict intrinsic parameters fluctuations is presented, and the future challenges that have to be addressed in order to improve the accuracy and the predictive power of the intrinsic fluctuation simulations are also discussed.
Journal ArticleDOI

An empirical model for device degradation due to hot-carrier injection

TL;DR: In this article, an empirical model for device degradation due to hot-carrier injection in submicron n-channel MOSFET's is presented, and the relationship between device degradation, drain voltage, and substrate current is clarified on the basis of experiments and modeling.
Journal ArticleDOI

Process Technology Variation

TL;DR: The importance of process variation in modern transistor technology is discussed, front-end variation sources are reviewed, device and circuit variation measurement techniques are presented, and recent intrinsic transistor variation performance from the literature is compared.
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