Showing papers on "Parasitic element published in 2019"

Electrical Performance Advancement in SiC Power Module Package Design With Kelvin Drain Connection and Low Parasitic Inductance

Abstract: Silicon carbide (SiC) power modules are promising for high-power applications because of the high breakdown voltage, high operation temperature, low ON-resistance, and fast switching speed However, the large parasitic inductance in existing package designs results in compromised performance, ie, long blanking time in the desaturation protection scheme and large overvoltage spikes during the switching transient Consequently, the benefits of SiC devices are often not fully utilized in practical applications This paper deals with these two issues and aims at improving the electrical performance of the existing SiC module package Specifically, a package design with Kelvin drain-to-source connection is first proposed to minimize the blanking time More than 99% reduction of blanking time is achieved experimentally compared to the conventional package design Second, a low parasitic inductance package with double-side cooling is proposed to allow the fast switching speed of SiC devices without sacrificing the thermal performance A power loop inductance of 163 nH is realized from Q3D simulation Verified by the experiment, more than 60% reduction of power loop inductance is achieved in comparison to a previously designed baseline module At 0- $\Omega $ external gate resistance, the turn-off voltage spike is less than 9% of the dc-link voltage under the rated load condition

A Modified Meander Line Microstrip Patch Antenna With Enhanced Bandwidth for 2.4 GHz ISM-Band Internet of Things (IoT) Applications

Abstract: Internet of Things (IoT) based application requires integration with the wireless communication technology to make the application data readily available. In this paper, a modified meander shape microstrip patch antenna has been proposed for IoT applications at 2.4 GHz ISM (Industrial, Scientific and Medical) band. The dimension of the antenna is 40×10×1.6 mm 3 . The antenna design is comprised of an inverse S-shape meander line connected with a slotted rectangular box. A capacitive load (C-load) and parasitic patch with the shaped ground are applied to the design. Investigations show that the antenna designed with an inverse S-shape patch and connecting rectangular box in the microstrip line has a higher efficiency and gain compare to the conventional meander shape antenna. The C-load is applied to the feed line to match the impedance. Moreover, parametric studies are carried out to investigate the flexibility of the antenna. Results show that, the gain and efficiency can be improved through adjusting the rectangular box with applying parasitic element and the shaped ground. The parasitic element has high impact on the bandwidth of the antenna of 12.5%. The finalized antenna has a peak gain of -0.256 dBi (measured) and 1.347 dBi (Simulated) with 79% radiation efficiency at 2.4 GHz. To prove the efficiency and eligibility in IoT applications, the measurement of the power delivered and received by the antenna at 2.4 GHz is performed and compared with the results of a dipole antenna. The antenna is integrated with 2.4 GHz radio frequency module and IoT sensors to validate the performance. The antenna novelty relies on the size compactness with high fractional bandwidth that is validated through the IoT application environment.

Microwave Jerusalem cross absorber by metamaterial split ring resonator load to obtain polarization independence with triple band application

Abstract: Microwave Jerusalem cross (JC) absorbers are interesting for different researches such as medical imaging. The split ring resonators (SRRs) are suggested as the conventional metamaterial elements which are noticed in this paper. Loads are used for JC absorber for achieving dual and triple band characteristic at X-band and Ku-band application. We show that the JC absorber has a single resonance and the final model has triple resonance 8.6, 10.2, 11.95 GHz with absorption more than 84%. The results show that how the parasitic element can provide new capacitance and inductance to make new resonance and the current distribution revealed the new capacitance in the structures. The symmetrical arrangement of the absorber made polarization independence and also by loads. We have tried to save this quality and current distribution revealed that how the elements affected the current dispense on the metal particle and gaps. The prototype absorber is fabricated on FR-4 and simulation results are compared and confirmed with experimental.

A High-Frequency and High Spatial Resolution Probe Design for EMI Prediction

Abstract: In this paper, a simple and accurate equivalent circuit of the magnetic probe is proposed. Based on the equivalent circuit, a high-frequency probe for near-field measurements is proposed, manufactured, and tested. To increase its working frequency, its parasitic inductance and capacitance are reduced by using a small loop aperture and a tapered transition. The working frequency of the probe is up to 30 GHz. At the same time, sidewall metallization and bottom-vias are used in the probe, which result in a good performance of electric field suppression. The transmission section of the probe is optimized at high frequencies by using via fence and coax-thru-hole vias. The magnetic field probe is built on a four-layered printed circuit board with Rogers substrate. The loop aperture size of the probe is $250\,\,\mu \text{m}\,\,\times 250\,\,\mu \text{m}$ , so it has a high spatial resolution and is helpful to measure the detailed magnetic field from a small device. The probe is calibrated by a standard coplanar waveguide with a backside ground (CPWG). Finally, a near-field scanning system with the fabricated probe is set up to test the magnetic field above an unknown CPWG and microstrip line. From the near-field scanning results, it can be concluded that the probe can accurately measure the magnetic field over a wide frequency band.

Flexible PCB-Based 3-D Integrated SiC Half-Bridge Power Module With Three-Sided Cooling Using Ultralow Inductive Hybrid Packaging Structure

Abstract: Silicon carbide (SiC) devices are capable of high switching speeds and also enable high switching frequency in power electronic converters. However, this feature poses substantial challenges to packaging, especially limiting the loop inductance. The traditional wire-bonding packaged power module has large parasitic inductance, which will cause voltage overshoot, oscillation, parasitic turn-on, and EMI issues. In order to reduce the parasitic inductance, this paper proposes a flexible printed circuit board (FPCB) based full SiC half-bridge power module with a novel low inductive hybrid packaging structure and three-dimensional (3-D) integration method. This hybrid packaging structure has an ultrathin FPCB substrate stacked on a direct bonding copper (DBC) substrate, which forms a multilayer 3-D power loop. The SiC chips are soldered on the DBC substrate for good thermal dissipation through a cavity in the FPCB substrate. After power loop optimization, the power loop inductance of a 1200-V/120-A SiC power module is only 0.79 nH. The power module consists of three submodules, which are connected by the bendable FPCB substrate. The bendable power module enables maximum utilization of 3-D space. The gate drive, decoupling capacitors, and dc-link capacitors are also integrated and 3D-structured using rigid-flexible PCBs. Moreover, the cooling system is a high-efficiency three-sided cooling structure for the bendable power module. The simulation results show that the three-sided cooling structure reduces the heatsink volume by 50%. Applying this method, the converter can be designed as a system-in-package and a 3D-structured compact system. The power density of a 20-kW three-phase inverter will reach 19.3 kW/L based on this power module. In this paper, the 1200-V/120-A power module fabrication and assembly processes are given. Finally, the static and dynamic experimental comparisons are done for a commercial power module and the proposed power module. The experiment results show that the voltage overshoot of the proposed module reduces about 5.8 times and are consistent with the simulation results. Meanwhile, the proposed power module switching speed is 1.8 times faster than the commercial module under zero external gate resistors and the switching loss can reduce by about 60%.

Improved Signal-to-Noise Ratio, Bandwidth-Enhanced Electrically Small Antenna Augmented With Internal Non-Foster Elements

Abstract: Non-Foster technology facilitates the ability to surpass the Chu bandwidth limit associated with electrically small antennas (ESAs). Nonetheless, in addition to challenging stability issues, the enhanced performance can come at the cost of increased noise and resistance losses generated by the active circuit. Consequently, low total efficiency and degraded signal-to-noise ratio (SNR) values can arise. Stability and SNR have dominated most reports to date; little has been discussed with regard to the underlying innovative physics of non-Foster augmented radiators. In this communication, we propose a broad bandwidth non-Foster ESA, emphasizing those aspects. By embedding a non-Foster element into the near-field resonant parasitic element of a metamaterial-inspired antenna, its electrically small size is maintained. On the other hand, a 5-times enhancement of its −10 dB fractional bandwidth (15 times its −3 dB bandwidth) is measured, significantly surpassing its passive Chu limit. Under a good matching, the measurements demonstrate that this non-Foster ESA achieves a 1.05 dBi peak gain and realizes average 5.0 dB SNR and 17 dB gain improvements over its passive counterpart.

A Compact Planar Quasi-Yagi Antenna With Bandpass Filtering Response

Abstract: A planar quasi-Yagi antenna with bandpass filtering response is presented. The quasi-Yagi antenna consists of a double-sided printed driven dipole, an offset double-sided parallel-strip line (DSPSL) director, a DSPSL reflector, and an offset DSPSL parasitic element. Both the reflector and the parasitic element can produce an extra radiation null at the band-edges of the passband, and the parasitic element can also generate an additional resonance within the passband. As a result, a compact wideband quasiYagi antenna with quasi-elliptic bandpass filtering response is obtained, without requiring any extra filtering circuit. In addition, the antenna is fed by a balanced DSPSL, and therefore, no balun is needed, leading to a very simple feeding structure. For demonstration, a prototype operating at 2.4 GHz was designed and measured. The prototype has a low profile of 0.006λ0, a -10-dB impedance bandwidth of 30.4%, an average gain of 5.7 dBi over the passband, and an out-of-band suppression level of about 20 dB in the near stopbands.

High inter-element isolation and WLAN filtering mechanism: A compact MIMO antenna scheme

Abstract: A multiple-input-multiple-output (MIMO) wireless local area network (WLAN) band-notched antenna with high inter-element isolation is proposed. The proposed MIMO system is composed of two monopole antennas, each composed of a slotted radiating patch and a stepped ground plane. The embedded slots and the ground plane steps are wisely located to achieve the desired wide band functionality as well as WLAN band-notched realization. The overall size of the MIMO antenna is 20 × 34 mm2 printed on 1.6 mm FR4 substrate. Moreover, to reduce the coupling between the constituent monopole antennas and enhance the isolation, a parasitic element is embedded between the antennas on the substrate backside. By wise tuning of the position and dimensions of the parasitic element, high isolation is achieved which is necessary for MIMO communication systems. Both simulation and measured results confirm a 10-dB impedance bandwidth of 2.6–11.2 GHz excluding the rejected band for |S11| ≤ −10 dB, and |S21| ≤ −20 dB. Wide bandwidth, small size, and band-notched feature are some of the merits of the proposed MIMO antenna. Detailed analysis on the antenna performance are released in detail throughout the paper.

Highly Sensitive Active-Matrix Driven Self-Capacitive Fingerprint Sensor based on Oxide Thin Film Transistor.

Abstract: The fingerprint recognition has been widely used for biometrics in mobile devices. Existing fingerprint sensors have already been commercialized in the field of mobile devices using primarily Si-based technologies. Recently, mutual-capacitive fingerprint sensors have been developed to lower production costs and expand the range of application using thin-film technologies. However, since the mutual-capacitive method detects the change of mutual capacitance, it has high ratio of parasitic capacitance to ridge-to-valley capacitance, resulting in low sensitivity, compared to the self-capacitive method. In order to demonstrate the self-capacitive fingerprint sensor, a switching device such as a transistor should be integrated in each pixel, which reduces a complexity of electrode configuration and sensing circuits. The oxide thin-film transistor (TFT) can be a good candidate as a switching device for the self-capacitive fingerprint sensor. In this work, we report a systematic approach for self-capacitive fingerprint sensor integrating Al-InSnZnO TFTs with field-effect mobility higher than 30 cm2/Vs, which enable isolation between pixels, by employing industry-friendly process methods. The fingerprint sensors are designed to reduce parasitic resistance and capacitance in terms of the entire system. The excellent uniformity and low leakage current (<10−12) of the oxide TFTs allow successful capture of a fingerprint image.

Al0.75Ga0.25N/Al0.6Ga0.4N heterojunction field effect transistor with fT of 40 GHz

Abstract: An Al0.75Ga0.25N/Al0.6Ga0.4N heterostructure field effect transistor with graded MBE-regrown contacts is designed, grown, and fabricated on AlN/sapphire substrate. Maximum drain current density (ID,max) of 460 mA mm−1 was obtained on transistors with gate length of 130 nm. The small signal measurement shows current/power gain cutoff frequency (fT/fmax) of 40 GHz/58 GHz, respectively. Parasitic resistance is found to be a significant factor limiting the frequency performance of the devices. The high frequency performance of devices with high Al concentration AlGaN channel demonstrate potential for high power and high frequency applications.

Electrical Characteristic of AlGaN/GaN High-Electron-Mobility Transistors With Recess Gate Structure

Abstract: AlGaN/GaN high-electron-mobility transistors (HEMTs) with nonrecess and recess gates are simulated by solving a set of drift–diffusion equations for electrostatic potential and electron–hole concentrations with self-heating model. The approach is first calibrated for both HEMT devices with experimentally measured data, to provide the best accuracy of the simulation. Recess gate device suffers from high potential to the channel, increased parasitic resistances, and deep level traps in barrier due to surface roughness. In addition, selective thinning of the barrier and increase parasitic resistance results in 17% reduction on the carrier concentration. The carrier mobility degradation due to surface roughness and electron velocity lessen due to high electric field result shrinkage of current density with considerable shift of the threshold voltage toward positive value. Even though transconductance does not seems to be remarkably changed for 3-nm recess gate, its value increases on deeper recess. This paper reveals that surface roughness is crucial issue that has dominant role behind the low current density in the recess gate structure. The detail physical understanding of the recess technology will be helpful to minimize the performance deterioration of the explored devices.

Compact and Flexible Novel Wideband Flower-Shaped CPW-Fed Antennas for High Data Wireless Applications

Abstract: This communication presents two compact and flexible flower-shaped coplanar waveguide (CPW)-fed antennas (Antenna-1 and Antenna-2) for high data wireless applications. The radiators of the proposed antennas are backed by a flexible and biocompatible polyamide substrate ( $\varepsilon _{r} = 4.3$ and tan $\delta = 0.004$ ) with 0.025 mm thickness. The flower-shaped radiators of both antennas are designed by introducing rounded slots in the basic circular shape and attaching two branches with the $50~\Omega $ microstrip line. Antenna-1 provides resonance in the 3.5 GHz WiMAX band with a total bandwidth and gain of 484 MHz (3.3–3.784 GHz) and 1.88 dBi, respectively. Antenna-2 is designed by embedding a parasitic element at the back of the substrate of Antenna-1, which leads to significant improvement in the bandwidth. Antenna-2 can also be employed in flexible devices for dual-band operation by proper adjustment of its parasitic element radius and position. A prototype of Antenna-2 is fabricated, and measurements are conducted in the flat as well as in the concave and convex bent configurations for the characterization of its flexibility. It is observed that bending has no prominent effects on the overall performance, except a small shift in the operating frequencies. The proposed flower-shaped antennas are not only visually attractive but also show salient performance. Due to the low cost, visual attraction, compact size, wide bandwidth, and easy integration, the proposed antennas may be used in high data wireless applications as external antennas.

Bandwidth Enhancement and Mutual Coupling Reduction Using a Notch and a Parasitic Structure in a UWB-MIMO Antenna

Abstract: The correlation between the antennas of multiple-input, multiple-output (MIMO) systems in limited spaces and size degrades the performance and capacity by either using complex coupling or decoupling structures. For isolation improvement, this paper presents the simple design of a compact high-isolation ultra-wideband (UWB) MIMO antenna with a circular parasitic element at the back side of the radiating patch, thereby creating the reverse coupling and helping reduce the mutual coupling at the upper part of the frequency bands, and a small rectangular notch at the ground plane to extend the impedance bandwidth of the monopole antenna. This approach eliminates the use of complex coupling or decoupling structures and complex feeding networks. A novel feature of our design is that the MIMO antenna exhibits a very low envelope correlation coefficient (ECC 9.99) and wide impedance bandwidth of 139 % from 3.1 to 17.5 GHz applicable for not only UWB application, but also next generation wireless communication, 5G. The high peak gain over the entire UWB and the upper part of the overall frequency band ensure that the antenna can be used in MIMO applications owing to the close agreement between the simulated and measured results.

Parasitic Inductance Modeling and Reduction for a Wire Bonded Half Bridge SiC MOSFET Multichip Power Module

Abstract: The parasitic inductance in the current commutation loop (CCL) could cause current and voltage oscillations during switching transient, increase switching loss, EMI and voltage stress on power semiconductor devices. These undesirable features intensify with the use of Wide Bandgap (WBG) devices due to increased switching speed and lower on-resistance. In this paper, the parasitic inductance of the current commutation loop is modeled with Partial Element Equivalent Circuit (PEEC) method for SiC multichip module. Different from other studies, the mutual inductance between paralleled branches are thoroughly analyzed and included in the model. As shown in Finite Element Analysis (FEA) simulation and experiment measurement, the mutual inductance has significant influence on the accuracy of the model. A wire bonded package layout is then proposed for SiC multichip half bridge modules that could reduce parasitic inductance without increasing fabrication difficulty. The effectiveness of the developed structure is verified with 3D FEA simulation and experiment.

Prevention of Oscillatory False Triggering of GaN-FETs by Balancing Gate-Drain Capacitance and Common-Source Inductance

Abstract: Gallium-nitride-field-effect transistors (GaN-FETs) are promising switching devices with fast switching capability However, they commonly have low gate threshold voltage, suffering from susceptibility to the false triggering Particularly, the oscillatory false triggering, ie, a self-sustaining repetitive false triggering, can occur after a fast switching, which is a severe obstacle for industrial applications The purpose of this paper is to elucidate the design instruction for preventing this phenomenon The oscillatory false triggering is known to be caused by the parasitic oscillator circuit formed of a GaN-FET, its parasitic capacitance and the parasitic inductance of the wiring This paper analyzed the nonoscillatory condition of this oscillator The result revealed an appropriate ratio between the gate-drain capacitance and the common-source inductance is a key to prevent the oscillatory false triggering Experiment successfully verified this analysis result, supporting the effectiveness of the appropriate design of this ratio for preventing the oscillatory false triggering

Parasitic Memcapacitor Effects on HP TiO 2 Memristor Dynamics

Abstract: In this paper, we study an HP TiO 2 memristor model with a parasitic memcapacitor, and it is shown that the parasitic element has significant effects on the volt-ampere characteristics and the dynamics of the memristor circuits. Further, the study shows that the pinched point on the hysteresis loop of the HP TiO 2 memristor may deviate from the origin. We also show that the memristor with a parasitic memcapacitor will eventually lose its stored flux when its power is switched off. Furthermore, in order to study the parasitic effects in circuits, we derive a simple three-element series circuit that contains an inductor, a negative resistor, and an HP TiO 2 memristor. If the parasitic memcapacitor of the memristor is considered, we observe a parasitic periodic oscillation occurred in the circuit.

A parasitic resonator-based diamond-shaped microstrip antenna for microwave imaging applications

Abstract: This study proposes a new parasitic resonator-based diamond-shaped microstrip patch antenna for ultra-wideband microwave imaging applications. The antenna consists of a diamond-shaped radiating patch, partial ground plane, and four-star shape parasitic elements. The use of parasitic elements improves the antenna performance in terms of the bandwidth and gain. The proposed prototype has a compact dimension of 30 × 25 × 1.6 mm3. The antenna achieves an overall bandwidth (S11<-10dB) of 7.6 GHz (2.7–10.3 GHz) with more than 4 dBi realized gain and 80% efficiency across the radiating bandwidth. The modified structures of the design extended the usable upper frequency from 9.7 GHz to 10.3 GHz, and the lower frequency is decreased from 3.4 GHz to 2.7 GHz with maintaining the omnidirectional radiation pattern. The design and simulation of the antenna are performed in the 3D electromagnetic simulator CST Microwave Studio. The proposed antenna is used for breast phantom measurement system to analyze the variation of backscattering signal and transmit-received pulses. The observation during the analysis of the numerical and measured data reveals that the designed antenna is a suitable candidate for ultra-wideband (UWB)-based microwave imaging applications.

Miniaturised low-profile super-wideband Koch snowflake fractal monopole slot antenna with improved BW and stabilised radiation pattern

Abstract: This communication explores the super-wideband Koch snowflake fractal monopole slot antenna for different wireless/multiband applications. The antenna comprises of a modified star-shaped patch, a 50 Ω triangular tapered feedline, a partial slot loaded ground plane and an I-shaped parasitic element located beneath the radiating element. The self-similarity and space-filling features of Koch iteration technique have been employed at the triangular patch to acquire the antenna compactness and broadband performances. Further by placing a pair of symmetrical L-shaped slots and an inverted U-shaped slot in the ground plane, a super-wide-impedance bandwidth (BW) ( ) of 650 MHz–20 GHz with a ratio BW of 30.7:7 is attained. The proposed antenna has a compact size of 17 × 29 × 0.787 mm 3 and has a stable radiation pattern over the entire frequency spectrum. For pattern stability, an I-shaped parasitic element was utilised. Moreover, the typical antenna parameters such as return loss, gain, radiation pattern and group delay have been simulated and verified experimentally. Time-domain characteristics have also been studied.

A Metal-Via Resistance Based Physically Unclonable Function with 1.18% Native Instability

Abstract: A physically unclonable function (PUF) leveraging the parasitic resistance created by the metal-via interconnection as entropy source is proposed in this paper. Metals 2 through 6 of a 65nm process is used to create the necessary parasitic resistance. Instead of using additional stabilization techniques, an incremental analog-to-digital converter is implemented to precisely measure the voltage difference between two branches consisting of the metal-via interconnection based parasitic resistances. The fabricated PUF, without using any post processing algorithm, achieves a native instability of 1.18% with 1000 repeated evaluations. The worst-case instability for voltage and temperature ranging from 0.8V to 1.3V and 0°C to 85°C, respectively is below 2.5%. The distance ratio between intra-die and inter-die Hamming Distance is above 310X.

Review and Bandwidth Measurement of Coaxial Shunt Resistors for Wide-Bandgap Devices Dynamic Characterization

Abstract: Coaxial shunt resistors are very useful for measuring the ultra-fast current in wide-bandgap device switching transients. One of their major drawbacks is the relatively large parasitic inductance. The traditional coaxial shunt resistors are reviewed and the relationship between energy rating and parasitic inductance is determined. The parasitic inductance can be greatly reduced with a lower energy rating. A measurement method for characterizing their up to GHz bandwidth is also reported. Lower than expected bandwidth was observed and a fix using measured transfer characteristics is therefore described.

Topology optimization of conductors in electrical circuit

Abstract: This study proposes a topology optimization method for realizing a free-form design of conductors in electrical circuits. Conductors in a circuit must connect components, such as voltage sources, resistors, capacitors, and inductors, according to the given circuit diagram. The shape of conductors has a strong effect on the high-frequency performance of a circuit due to parasitic circuit elements such as parasitic inductance and capacitance. In this study, we apply topology optimization to the design of such conductors to minimize parasitic effects with maximum flexibility of shape manipulation. However, when the distribution of conductors is repeatedly updated in topology optimization, disconnections and connections of conductors that cause open and short circuits, respectively, may occur. To prevent this, a method that uses fictitious electric current and electric field calculations is proposed. Disallowed disconnections are prevented by limiting the maximum value of the fictitious current density in conductors where a current is induced. This concept is based on the fact that an electric current becomes concentrated in a thin conductor before disconnection occurs. Disallowed connections are prevented by limiting the maximum value of the fictitious electric field strength around conductors where a voltage is applied. This is based on the fact that the electric field in a parallel plate capacitor is inversely proportional to the distance between the plates. These limitations are aggregated as a single constraint using the Kreisselmeier-Steinhauser function in the formulation of optimization problems. This constraint prevents only disallowed disconnections and connections, but does not prevent allowed topology changes. The effectiveness of the constraint is confirmed using simple examples, and an actual design problem involving conductors in electromagnetic interference filters is used to verify that the proposed constraint can be utilized for conductor optimization.

Design and Characterizations of a Planar Multichip Half-Bridge Power Module by Pressureless Sintering of Nanosilver Paste

Abstract: A planar phase-leg 650-V/240-A insulated-gate bipolar transistor (IGBT) module with 16 IGBT chips and 16 free-wheeling diodes has been demonstrated by pressureless sintering nanosilver paste to achieve extremely high power density and low parasitic inductance. Nanosilver paste was chosen as the die-attach material to increase the operation temperature as well as the power density and heat dissipation. The thermal coupling effect of so many power chips in parallel and the thermal performance of the planar IGBT module have been discussed. The electrical performance has also been characterized to verify the feasibility of the packaging process. The $I$ – $V$ curves between the two bridge arms were in good consistency, resulting from the symmetrical architecture. The low switching loss of the multichip planar IGBT module can be attributed to its low parasitic inductance since the removal of bonding wires and compact architecture. Thermomechanical reliability has also been investigated by the passive thermal shocking test of the module from −55 °C to 150 °C. In addition, the increment of $V_{\mathrm {CE(sat)}}$ of the modules reached the failure standard until 900 cycles.

Multi-band millimeter wave patch antennas

Abstract: An electronic device may be provided with wireless circuitry including first and second patch antennas. The first patch antenna may include a first resonating element formed over a ground plane. The second patch antenna may include a second resonating element over the first resonating element. A cross-shaped parasitic element may be formed over the second resonating element. First and second feed terminals may be coupled to the second resonating element. An opening may be formed in the first resonating element. First and second transmission lines may be coupled to the first and second feed terminals through the opening. The cross-shaped parasitic element may include arms that overlap the first and second feed terminals. The first resonating element may cover first frequencies between 10 GHz and 300 GHz and the second resonating element may cover second frequencies that are higher than the first frequencies.

Expansion of the Junction Temperature Measurement via the Internal Gate Resistance to a wide range of Power Semiconductors

Abstract: The temperature dependent internal gate resistance R gi of MOS devices is suitable for online $T$ j acquisition in operating application circuits. Recent publications have shown various measurement approaches and tested them for specific DUTs. In this work the issues arising when applying the Rgi-method to DUTs with a low Rgi and to SiC MOSFETs are described. If a device exhibits a low Rgi the measurement error due to parasitic resistance becomes relevant. For SiC MOSFETs frequency dependent effects, which can presumably be attributed to charge trapping at the gate oxide, have a significant influence on the measured data.

A Study of Hybrid Wide Slot Antenna with Hybrid Parasitic Element for Wideband Applications

Abstract: In this communication, a hybrid shaped wide slot antenna with hybrid parasitic element has been investigated which is fabricated on an FR-4 substrate (tan(δ) = 0.02, εr = 4.3). The mutual coupling (between the slot and tuning stub), tuning of resonating modes and bandwidth of the antenna are adjusted by changing the dimension of parasitic element and tuning stub. The measured fractional bandwidth of the proposed antenna is 146.82% for S11 < −10 dB which covers the frequency span from 0.92 to 6 GHz. This antenna exhibits resonances at 1.094, 1.56, 2.073, 2.67 and 4.02 GHz. Surface current distribution has been investigated, and series of equations are deduced for resonating frequencies. Radiation characteristic exhibits an eight-shaped pattern at fundamental mode frequency whereas at frequencies 2.85 and 3.91 GHz a distorted pattern has been observed. For understanding the behavior of the antenna, structural parameters are varied in specific ranges.

Wide Beam Coverage Dipole Antenna Array with Parasitic Elements for UAV Communication

Abstract: To apply the unmanned aerial vehicle (UAV) to everything (U2X) communication such as UAV and infrastructure, wide beam coverage dipole antenna array with parasitic elements is presented in this paper. Based on the linear array antenna theory using dipole antennas, it consists of two dipole antennas with parasitic elements. The proposed antenna is composed of a radiator in top substrate, two supports with the balun, and metallic reflector with a feeder. Two dipole antennas made up of broadside beam. Moreover, added parasitic elements improve the beam coverage. Simulated 10-dB impedance bandwidth is approximately 14% and the center frequency is 5.09 GHz. The peak gain, total efficiency, and half power beamwidth (HPBW) are 5 dBi, 84%, and 161°, respectively. Compared to dipole antenna array without parasitic elements (reference antenna), the proposed antenna improved approximately 156% of beam coverage.

Improved turn-on behavior in a diode-triggered silicon-controlled rectifier for high-speed electrostatic discharge protection

Abstract: A conventional diode-triggered silicon-controlled rectifier (DTSCR) structure with a layout strategy for electrostatic discharge (ESD) protection is presented and confirmed in a 65-nm CMOS technology. The modified device is featured by a scaled-down trigger-diode string, which shortens its turn-on time using a variable scaling factor. To confirm the parasitic resistance adjustments of the modified DTSCR, transmission line pulsing (TLP)/very fast transmission line pulsing (VF-TLP) tests and simulations are performed on the device. Compared to a conventional DTSCR, this structure exhibits an improved turn-on speed and robustness, which are suitable for I/O protection of ESD events in the nanosecond range, particularly the charged-device model (CDM) event.