Showing papers on "Strained silicon published in 2012"

Apparatus and method for forming semiconductor contacts

Abstract: A method for forming semiconductor contacts comprises forming a germanium fin structure over a silicon substrate, depositing a doped amorphous silicon layer over the first drain/source region and the second drain/source region at a first temperature, wherein the first temperature is lower than a melting point of the germanium fin structure and performing a solid phase epitaxial regrowth process on the amorphous silicon layer at a second temperature, wherein the second temperature is lower than the melting point of the germanium fin structure.

In situ imaging of the conducting filament in a silicon oxide resistive switch

Abstract: The nature of the conducting filaments in many resistive switching systems has been elusive. Through in situ transmission electron microscopy, we image the real-time formation and evolution of the filament in a silicon oxide resistive switch. The electroforming process is revealed to involve the local enrichment of silicon from the silicon oxide matrix. Semi-metallic silicon nanocrystals with structural variations from the conventional diamond cubic form of silicon are observed, which likely accounts for the conduction in the filament. The growth and shrinkage of the silicon nanocrystals in response to different electrical stimuli show energetically viable transition processes in the silicon forms, offering evidence for the switching mechanism. The study here also provides insights into the electrical breakdown process in silicon oxide layers, which are ubiquitous in a host of electronic devices.

Resonant addressing and manipulation of silicon vacancy qubits in silicon carbide.

Abstract: Several systems in the solid state have been suggested as promising candidates for spin-based quantum information processing. In spite of significant progress during the last decade, there is a search for new systems with higher potential [D. DiVincenzo, Nat. Mater. 9, 468 (2010)]. We report that silicon vacancy defects in silicon carbide comprise the technological advantages of semiconductor quantum dots and the unique spin properties of the nitrogen-vacancy defects in diamond. Similar to atoms, the silicon vacancy qubits can be controlled under the double radio-optical resonance conditions, allowing for their selective addressing and manipulation. Furthermore, we reveal their long spin memory using pulsed magnetic resonance technique. All these results make silicon vacancy defects in silicon carbide very attractive for quantum applications.

Effects of strain on the carrier mobility in silicon nanowires.

Abstract: We investigate electron and hole mobilities in strained silicon nanowires (Si NWs) within an atomistic tight-binding framework. We show that the carrier mobilities in Si NWs are very responsive to strain and can be enhanced or reduced by a factor >2 (up to 5×) for moderate strains in the ±2% range. The effects of strain on the transport properties are, however, very dependent on the orientation of the nanowires. Stretched ⟨100⟩ Si NWs are found to be the best compromise for the transport of both electrons and holes in ≈10 nm diameter Si NWs. Our results demonstrate that strain engineering can be used as a very efficient booster for NW technologies and that due care must be given to process-induced strains in NW devices to achieve reproducible performances.

Processes and structures for dopant profile control in epitaxial trench fill

Abstract: Methods of depositing epitaxial material using a repeated deposition and etch process The deposition and etch processes can be repeated until a desired thickness of silicon-containing material is achieved During the deposition process, a doped silicon film can be deposited The doped silicon film can be selectively deposited in a trench on a substrate The trench can have a liner comprising silicon and carbon prior to depositing the doped silicon film The doped silicon film may also contain germanium Germanium can promote uniform dopant distribution within the doped silicon film

Silicon germanium mask for deep silicon etching

Abstract: Polycrystalline silicon germanium (SiGe) can offer excellent etch selectivity to silicon during cryogenic deep reactive ion etching in an SF 6 /O 2 plasma. Etch selectivity of over 800:1 (Si:SiGe) may be achieved at etch temperatures from −80 degrees Celsius to −140 degrees Celsius. High aspect ratio structures with high resolution may be patterned into Si substrates using SiGe as a hard mask layer for construction of microelectromechanical systems (MEMS) devices and semiconductor devices.

Silicon Filaments in Silicon Oxide for Next-Generation Photovoltaics

Abstract: Nanometer wide silicon filaments embedded in an amorphous silicon oxide matrix are grown at low temperatures over a large area. The optical and electrical properties of these mixed-phase nanomaterials can be tuned independently, allowing for advanced light management in high efficiency thin-film silicon solar cells and for band-gap tuning via quantum confinement in third-generation photovoltaics.

Heterojunction silicon microwire solar cells.

Abstract: We report radial heterojunction solar cells of amorphous silicon on crystalline silicon microwires with high surface passivation. While the shortened collection path is exploited to increase the photocurrent, proper choice of the wire radius and the highly passivated surface prevent drastic decrease in the voltage due to high surface-to-volume ratio. The heterojunction is formed by depositing a ∼12–16 nm of amorphous silicon on crystalline silicon wires of radius approximately equal to minority carrier diffusion length (∼10 μm). In spite of very short carrier lifetime (<1 μs), the microwire array devices generate photocurrent of ∼30 mA/cm2, and the same time, voltages close to 600 mV are achieved, leading to efficiency in excess of 12% in extremely short carrier lifetime silicon. We also find that formation of nanocrystallites of silicon in the deposited film results in loss of the expected passivation.

Strain-Induced Performance Improvements in InAs Nanowire Tunnel FETs

Abstract: This paper investigates the electrical performance improvements induced by appropriate strain conditions in n-type InAs nanowire tunnel FETs in the context of a systematic comparison with strained silicon MOSFETs. To this purpose, we exploited a 3-D simulator based on an eight-band k p Hamiltonian within the nonequilibrium Green function formalism. Our model accounts for arbitrary crystal orientations and describes the strain implicitly by a modification of the band structure. The effect of acoustic- and optical-phonon scattering is also accounted for in the self-consistent Born approximation. Our results show that appropriate strain conditions in n-type InAs tunnel FETs induce a remarkable enhancement of Ion with a small degradation of the subthreshold slope, as well as large improvements in the Ioff versus Ion tradeoff for low Ioff and VDD values. Hence, an important widening of the range of Ioff and VDD values where tunnel FETs can compete with strained silicon MOSFETs is obtained.

Enhanced first-order Raman scattering from arrays of vertical silicon nanowires

Abstract: Vertical ordered silicon nanowire arrays with diameters ranging from 30 to 60 nm are fabricated and display enhanced Raman scattering. The first-order 520 cm 1 phonon mode shows no significant shift or peak broadening with increasing laser power, suggesting that the excellent defect-free diamond crystalline structure and thermal properties of bulk silicon are maintained. The Raman enhancement per unit volume of the first-order phonon peak increases with increasing nanowire diameter, and has maximum enhancement factors of 7.1 and 70 when compared to the original silicon on insulator (SOI) and bulk silicon wafers, respectively. For the array with 60 nm diameter nanowires, the total Raman intensity is larger than that of the SOI wafer. The results are understood using a model based on the confinement of light and are supported by finite difference time domain (FDTD) simulations. (Some figures may appear in colour only in the online journal)

Control of tensile strain in germanium waveguides through silicon nitride layers

Abstract: Germanium ridge waveguides can be tensilely strained using silicon nitride thin films as stressors. We show that the strain transfer in germanium depends on the width of the waveguides. Carrier population in the zone center Γ valley can also be significantly increased when the ridges are oriented along the 〈100〉 direction. We demonstrate an uniaxial strain transfer up to 1% observed on the room temperature direct band gap photoluminescence of germanium. The results are supported by 30 band k·p modeling of the electronic structure and the finite element modeling of the strain field.

Deep-ultraviolet Raman investigation of silicon oxide: thin film on silicon substrate versus bulk material

Abstract: Raman spectroscopy is a powerful experimental technique for structural investigation of silicon based electronic devices such as metal‐oxide‐semiconductor-type structures. It is widely used for characterization of mechanical stress distribution in silicon substrate. However, in the case of Raman measurements of oxide layer on silicon substrate visible excitation makes this technique almost useless. The reason for this difficulty is two-phonon scattering from silicon substrate which masks the signal from oxide layer. Application of deep-ultraviolet (deep-UV) excitation reduces the penetration depth of the radiation into silicon substrate about 30 times. As a result, the simultaneous measurement of one-phonon scattering from silicon substrate and the Raman spectrum of the oxide layer become possible. This work presents the study of thin silicon oxide film on silicon substrate with application of deep-UV Raman scattering. The spectra measured for thin film are compared with reference spectra obtained for bulk material.

Silicon nanowire solar cells grown by PECVD

Abstract: Silicon nanowires offer an opportunity to improve light trapping in low-cost silicon photovoltaic cells. We have grown radial junctions of hydrogenated amorphous silicon over p-doped crystalline silicon nanowires in a single pump-down plasma enhanced chemical vapor deposition process on glass substrates. By using Sn catalysts and boosting p-type doping in the nanowires, the open-circuit voltage of the devices increased from 200 to 800 mV. Light trapping was optimized by extending the length of nanowires in these devices from 1 to 3 μm, producing currents in excess of – 13 mA cm− 2 and energy conversion efficiencies of 5.6%. The advantages of using thinner window layers to increase blue spectral response were also assessed.

Fabrication of graphene nanoelectronic devices on SOI structures

Abstract: A semiconductor-on-insulator structure and a method of forming the silicon-on-insulator structure including an integrated graphene layer are disclosed. In an embodiment, the method comprises processing a silicon material to form a buried oxide layer within the silicon material, a silicon substrate below the buried oxide, and a silicon-on-insulator layer on the buried oxide. A graphene layer is transferred onto the silicon-on-insulator layer. Source and drain regions are formed in the silicon-on-insulator layer, and a gate is formed above the graphene. In one embodiment, the processing includes growing a respective oxide layer on each of first and second silicon sections, and joining these silicon sections together via the oxide layers to form the silicon material. The processing, in an embodiment, further includes removing a portion of the first silicon section, leaving a residual silicon layer on the bonded oxide, and the graphene layer is positioned on this residual silicon layer.

Performance enhancement in pmos and nmos transistors on the basis of silicon/carbon material

Abstract: A silicon/germanium material and a silicon/carbon material may be provided in transistors of different conductivity type on the basis of an appropriate manufacturing regime without unduly contributing to overall process complexity. Furthermore, appropriate implantation species may be provided through exposed surface areas of the cavities prior to forming the corresponding strained semiconductor alloy, thereby additionally contributing to enhanced overall transistor performance. In other embodiments a silicon/carbon material may be formed in a P-channel transistor and an N-channel transistor, while the corresponding tensile strain component may be overcompensated for by means of a stress memorization technique in the P-channel transistor. Thus, the advantageous effects of the carbon species, such as enhancing overall dopant profile of P-channel transistors, may be combined with an efficient strain component while enhanced overall process uniformity may also be accomplished.

Laser direct growth of graphene on silicon substrate

Abstract: We demonstrate laser direct growth of few layer graphene on a silicon substrate. In our study, a continuous wave laser beam was focused on a poly(methyl methacrylate) (PMMA)-coated silicon wafer to evaporate PMMA and melt the silicon wafer. Carbon atoms, decomposed from PMMA, were absorbed by the molten silicon surface, and then separated from silicon in the cooling process to form few-layer graphene. This Si-catalyzed method will provide a new approach and platform for applications of graphene.

$\Omega$ -Gated Silicon and Strained Silicon Nanowire Array Tunneling FETs

Abstract: This letter presents experimental results on tunneling field-effect transistors featuring arrays of Ω-gated uniaxially strained and unstrained silicon nanowires. The gate control of a SiO2/poly-Si gate stack is compared with a high-k/metal gate stack. Steep inverse subthreshold slopes down to 76 mV/dec and relatively high on-currents were achieved with the combination of high-k/metal gate and strained silicon nanowires. We observed negative differential conductance in the output characteristics, which we attribute to hot-carrier effects in the strong electric fields at the reverse-biased tunnel junction.

Conversion of thin transistor elements from silicon to silicon germanium

Abstract: Embodiments of the present disclosure provide techniques and configurations associated with conversion of thin transistor elements from silicon (Si) to silicon germanium (SiGe). In one embodiment, a method includes providing a semiconductor substrate having a channel body of a transistor device disposed on the semiconductor substrate, the channel body comprising silicon, forming a cladding layer comprising germanium on the channel body, and annealing the channel body to cause the germanium to diffuse into the channel body. Other embodiments may be described and/or claimed.

Efficient terahertz-wave generation via four-wave mixing in silicon membrane waveguides.

Abstract: Terahertz (THz) wave generation via four-wave mixing (FWM) in silicon membrane waveguides is theoretically investigated with mid-infrared laser pulses. Compared with the conventional parametric amplification or wavelength conversion based on FWM in silicon waveguides, which needs a pump wavelength located in the anomalous group-velocity dispersion (GVD) regime to realize broad phase matching, the pump wavelength located in the normal GVD regime is required to realize collinear phase matching for the THz-wave generation via FWM. The pump wavelength and rib height of the silicon membrane waveguide can be tuned to obtain a broadband phase matching. Moreover, the conversion efficiency of the THz-wave generation is studied with different pump wavelengths and rib heights of the silicon membrane waveguides, and broadband THz-wave can be obtained with high efficiency exceeding 1%.

Defect free strained silicon on insulator (ssoi) substrates

Abstract: A method of forming a strained semiconductor material that in one embodiment includes forming a cleave layer in a host semiconductor substrate, and contacting a strain inducing material layer on a surface of a transfer portion of the host semiconductor substrate. A handle substrate is then contacted to an exposed surface of the stress inducing material layer. The transfer portion of the host semiconductor substrate may then be separated from the host semiconductor substrate along the cleave layer. A dielectric layer is formed directly on the transfer portion of the host semiconductor substrate. The handle substrate and the stress inducing material are then removed, wherein the transferred portion of the host semiconductor substrate provides a strained semiconductor layer that is in direct contact with a dielectric layer.

Low-Temperature Epitaxy of Compressively Strained Silicon Directly on Silicon Substrates

Abstract: We report epitaxial growth of compressively strained silicon directly on (100) silicon substrates by plasma-enhanced chemical vapor deposition. The silicon epitaxy was performed in a silane and hydrogen gas mixture at temperatures as low as 150C. We investigate the effect of hydrogen dilution during the silicon epitaxy on the strain level by high-resolution x-ray diffraction. Additionally, triple-axis x-ray reciprocal-space mapping of the samples indicates that (i) the epitaxial layers are fully strained and (ii) the strain is graded. Secondary-ion mass spectrometry depth profiling reveals the correlation between the strain gradient and the hydrogen concentration profile within the epitaxial layers. Furthermore, heavily phosphorus-doped layers with an electrically active doping concentration of � 2 9 10 20 cm � 3 were obtained at such low growth temperatures.

Low temperature plasma deposition of silicon thin films: From amorphous to crystalline

Abstract: We report on the epitaxial growth of crystalline silicon films on (100) oriented crystalline silicon substrates by standard plasma enhanced chemical vapor deposition at 175 °C. Such unexpected epitaxial growth is discussed in the context of deposition processes of silicon thin films, based on silicon radicals and nanocrystals. Our results are supported by previous studies on plasma synthesis of silicon nanocrystals and point toward silicon nanocrystals being the most plausible building blocks for such epitaxial growth. The results lay the basis of a new approach for the obtaining of crystalline silicon thin films and open the path for transferring those epitaxial layers from c-Si wafers to low cost foreign substrates.

Method for forming a back-side illuminated image sensor

Abstract: A method for manufacturing a back-side illuminated image sensor, including the steps of: forming, inside and on top of an SOI-type silicon layer, components for trapping and transferring photogenerated carriers and isolation regions; forming a stack of interconnection levels on the silicon layer and attaching, on the interconnect stack, a semiconductor handle; removing the semiconductor support; forming, in the insulating layer and the silicon layer, trenches reaching the isolation regions; depositing a doped amorphous silicon layer, more heavily doped than the silicon layer, at least on the walls and the bottom of the trenches and having the amorphous silicon layer crystallize; and filling the trenches with a reflective material

Method and apparatus for forming silicon film

Abstract: Provided is a method and apparatus for forming a silicon film, which are capable of suppressing generation of a void or seam. The method includes performing a first film-forming process, performing an etching process, performing a doping process, and performing a second film-forming process. In the first film-forming process, a non-doped silicon film that is not doped with an impurity is formed so as to embed a groove of an object. In the etching process, the non-doped silicon film formed via the first film-forming process is etched. In the doping process, the non-doped silicon film etched via the etching process is doped with an impurity. In the second film-forming process, an impurity-doped silicon film is formed so as to embed the silicon film doped via the doping process.

Finfet device with isolated channel

Abstract: Despite improvements in FinFETs and strained silicon devices, transistors continue to suffer performance degradation as device dimensions shrink. These include, in particular, leakage of charge between the semiconducting channel and the substrate. An isolated channel FinFET device prevents channel-to-substrate leakage by inserting an insulating layer between the channel (fin) and the substrate. The insulating layer isolates the fin from the substrate both physically and electrically. To form the isolated FinFET device, an array of bi-layer fins can be grown epitaxially from the silicon surface, between nitride columns that provide localized insulation between adjacent fins. Then, the lower fin layer can be removed, while leaving the upper fin layer, thus yielding an interdigitated array of nitride columns and semiconducting fins suspended above the silicon surface. A resulting gap underneath the upper fin layer can then be filled in with oxide to isolate the array of fin channels from the substrate.

Impact of oxygen bonding on the atomic structure and photoluminescence properties of Si-rich silicon nitride thin films

Abstract: The atomic structure and optical properties of Si-rich silicon nitride thin films have been for decades the subject of intense research, both theoretically and experimentally. It has been established in particular that modifying the chemical composition of this material (e.g., the Si excess concentration) can lead to dramatic differences in its physical, optical, and electrical properties. The present paper reports on how the incorporation of oxygen into silicon nitride networks influences their chemical bonding and photoluminescence properties. Here, by using a combination of analytical scanning transmission electron microscopy and x-ray photoelectron spectroscopy it is demonstrated that the structure of Si-rich silicon nitride with low O content can be described by the co-existence of Si nanocrystals in a Si3N4 matrix, with occasional localized nano-regions of a Si2ON2 phase, depending on the amount of excess Si. Furthermore, it is shown that the structure of silicon nitride with high O content can be a...

Strained Silicon Photonics.

Abstract: A review of recent progress in the field of strained silicon photonics is presented. The application of strain to waveguide and photonic crystal structures can be used to alter the linear and nonlinear optical properties of these devices. Here, methods for the fabrication of strained devices are summarized and recent examples of linear and nonlinear optical devices are discussed. Furthermore, the relation between strain and the enhancement of the second order nonlinear susceptibility is investigated, which may enable the construction of optically active photonic devices made of silicon.

Strained silicon and strained silicon germanium on insulator

Abstract: A method for fabricating field effect transistors patterns a strained silicon layer formed on a dielectric layer of a substrate into at least one NFET region including at least a first portion of the strained silicon layer. The strained silicon layer is further patterned into at least one PFET region including at least a second portion of the strained silicon layer. A masking layer is formed over the first portion of the strained silicon layer. After the masking layer has been formed, the second strained silicon layer is transformed into a relaxed silicon layer. The relaxed silicon layer is transformed into a strained silicon germanium layer.