Showing papers on "Thin-film transistor published in 2005"

Amorphous oxide and thin film transistor

Abstract: The present invention relates to an amorphous oxide and a thin film transistor using the amorphous oxide. In particular, the present invention provides an amorphous oxide having an electron carrier concentration less than 10 18 /cm 3 , and a thin film transistor using such an amorphous oxide. In a thin film transistor having a source electrode 6 , a drain electrode 5 , a gate electrode 4 , a gate insulating film 3 , and a channel layer 2 , an amorphous oxide having an electron carrier concentration less than 10 18 /cm 3 is used in the channel layer 2.

Amorphous oxide and field effect transistor

Abstract: A novel amorphous oxide applicable, for example, to an active layer of a TFT is provided. The amorphous oxide comprises microcrystals.

Methods of making thin film transistors comprising zinc-oxide-based semiconductor materials and transistors made thereby

Abstract: A thin film transistor comprises a zinc-oxide-containing semiconductor material. Such transistors can further comprise spaced apart first and second contact means or electrodes in contact with said material. Further disclosed is a process for fabricating a thin film transistor device, wherein the substrate temperature is no more than 300° C. during fabrication.

Thin film transistor having an etching protection film and manufacturing method thereof

Abstract: A thin film transistor of the present invention includes a semiconductor thin film (8); a gate insulating film (7) formed on one surface of the semiconductor thin film (8); a gate electrode (6) formed to be opposite to the semiconductor thin film (8) through the gate insulating film (7); a source electrode (15) and a drain electrode (16) electrically connected to the semiconductor thin film (8); a source region; a drain region; and a channel region. The thin film transistor further includes an insulating film (9) formed on a peripheral portion corresponding to at least the source region and the drain region of the semiconductor thin film (8), and having a contact hole (10, 11) through which at least a part of each of the source region and the drain region is exposed wherein the source electrode (15) and the drain electrode (16) are connected to the semiconductor thin film (8) through the contact hole (10, 11).

Field effect transistor manufacturing method

Abstract: Provided is a novel method for manufacturing a field effect transistor. Prior to forming an amorphous oxide layer on a substrate, ultraviolet rays are irradiated onto the substrate surface in an ozone atmosphere, plasma is irradiated onto the substrate surface, or the substrate surface is cleaned by a chemical solution containing hydrogen peroxide.

High mobility transparent thin-film transistors with amorphous zinc tin oxide channel layer

Abstract: Transparent thin-film transistors (TTFTs) with an amorphous zinc tin oxide channel layer formed via rf magnetron sputter deposition are demonstrated. Field-effect mobilities of 5–15 and 20–50cm2V−1s−1 are obtained for devices post-deposition annealed at 300 and 600°C, respectively. TTFTs processed at 300 and 600°C yield devices with turn-on voltage of 0–15 and −5–5V, respectively. Under both processing conditions, a drain current on-to-off ratio greater than 107 is obtained. Zinc tin oxide is one example of a new class of high performance TTFT channel materials involving amorphous oxides composed of heavy-metal cations with (n−1)d10ns0 (n⩾4) electronic configurations.

Stretchable Interconnects for Elastic Electronic Surfaces

Abstract: Elastic electronic surfaces will integrate stiff thin film devices onto compliant polymer substrates. These surfaces may be stretched once or many times, by up to tens of percent strain. One way to make such an elastic electronic surface is to distribute rigid subcircuit islands over the polymer surface, and then fabricate active devices on the islands. These islands need to be interconnected with stretchable metallization. We describe stretchable interconnects made of stripes of thin gold film patterned on elastomeric membranes. These membranes can be stretched by up to twice their initial length and maintain electrical conduction. We review the fabrication of these conductors, present their electrical and mechanical properties, and summarize our model for their extreme stretchability. Using such stretchable interconnects, we made the first elastic circuit, an inverter of thin film transistors. The circuit remains functional when stretched and relaxed by 12% strain.

Liquid crystal display device and method for fabricating the same

Abstract: Disclosed are a liquid crystal display device which reduces the number of masks and improves an aperture ratio, and a method for fabricating the same. The liquid crystal display device includes gate and data lines perpendicularly intersecting on a substrate having pixel and pad parts; a thin film transistor on the substrate at the intersection of the gate and data lines; a pixel electrode on the substrate at the pixel part and connected directly to a drain electrode of the thin film transistor; an insulating film on the overall surface of the substrate including the pixel electrode and the thin film transistor; an organic film on the insulating film over the thin film transistor and the data line; and a common electrode of slit shapes overlapping the pixel electrode such that the insulating film is interposed between the common electrode and the pixel electrode.

Effect of Mesoscale Crystalline Structure on the Field‐Effect Mobility of Regioregular Poly(3‐hexyl thiophene) in Thin‐Film Transistors

Abstract: Regioregular poly(3-hexyl thiophene) (RR P3HT) is drop-cast to fabricate field-effect transistor (FET) devices from different solvents with different boiling points and solubilities for RR P3HT, such as methylene chloride, toluene, tetrahydrofuran, and chloroform. A Petri dish is used to cover the solution, and it takes less than 30 min for the solvents to evaporate at room temperature. The mesoscale crystalline morphology of RR P3HT thin films can be manipulated from well-dispersed nanofibrils to well-developed spherulites by changing solution processing conditions. The morphological correlation with the charge-carrier mobility in RR P3HT thin-film transistor (TFT) devices is investigated. The TFT devices show charge-carrier mobilities in the range of 10 - 4 ∼10 - 2 cm 2 V - 1 s - 1 depending on the solvent used, although grazing-incidence X-ray diffraction (GIXD) reveals that all films develop the same π-π-stacking orientation, where the -axis is normal to the polymer films. By combining results from atomic force microscopy (AFM) and GIXD, it is found that the morphological connectivity of crystalline nanofibrils and the -axis orientation distribution of the π-π-stacking plane with respect to the film normal play important roles on the charge-carrier mobility of RR P3HT for TFT applications.

Flexible flat panel displays

Abstract: List of Contributors. Foreword. Series Editor's Foreword. Preface. 1 Flexible Flat Panel Display Technology (Gregory P. Crawford). 1.1 Introduction. 1.2 Manufacturing. 1.3 Enabling Technologies. 1.4 Conclusions. References. 2 Engineered Films for Display Technologies (Bill A. MacDonald, Keith Rollins, Duncan MacKerron, Karl Rakos, Robert Eveson, and Bob Rustin). 2.1 Introduction. 2.2 Polymer Substrates. 2.3 Properties. 2.4 Polyester Films in Application. 2.5 Concluding Remarks. Acknowledgements. References. 3 Flexible Glass Substrates (Armin Plichta, Andreas Habeck, Silke Knoche, Norbert Hildebrand, Anke Kruse, and Andreas Weber). 3.1 Introduction. 3.2 Display Glass Properties. 3.3 Manufacturing of Thin "Flexible" Glass. 3.4 Mechanical Properties. 3.5 Improvement in Mechanical Properties of Glass. 3.6 Processing of Flexible Glass. 3.7 Current Thin Glass Substrate Applications and Trends. References. 4 Barrier Layer Technology for Flexible Displays (Gordon L. Graff, Paul E. Burrows, Rick E. Williford, and Robert F. Praino). 4.1 Introduction. 4.2 Development of Thin Film Vapor Barrier Systems. 4.3 Measurement Techniques. 4.4 Theories of Vapor Barrier Permeation. 4.5 Deconvolution of Experimental Data. 4.6 Discussion. 4.7 Conclusions. Acknowlegments. References. 5 Transparent Conducting Oxide Materials and Technology (David C. Paine, Hyo-Young Yeom and Burag Yaglioglu). 5.1 Introduction. 5.2 Materials Selection and Characterization. 5.3 Indium-Based Binary Oxides. 5.4 Future Directions for Transparent Conducting Oxides. 5.5 Summary. References. 6 Mechanics of ITO on Plastic Substrates for Flexible Displays (Piet C. P. Bouten, Peter J. Slikkerveer and Yves Leterrier). 6.1 Introduction. 6.2 Failure of Brittle Layers under Tensile Stress. 6.3 Failure of Brittle Layers under Compressive Stress. 6.4 The Failure Situation in a Display. 6.5 Conclusions. Acknowledgments. References. 7 Stability of Externally Deformed ITO Films (Jeong-In Han). 7.1 Introduction. 7.2 Mechanical Properties of Thin Films. 7.3 Conclusions. References. 8 Conductive Polymers (L. Bert Groenendaal). 8.1 Introduction. 8.2 Historical Overview. 8.3 Overview of Polymerization Methods. 8.4 Overview of Conductive Polymer Types. 8.5 Applications for Conductive Polymers. 8.6 Outlook. References. 9 Mechanical Reliability of Conductive Polymers for Rollable Display Applications (Darran R. Cairns). 9.1 Introduction. 9.2 Electromechanical Properties of Transparent Anodes. 9.2.1 ITO-coated PET in tension. 9.3 Environmental Degradation of PEDOT:PSS. 9.4 Cyclic Mandrel Loading of Flexible Anodes. 9.5 Conclusions. References. 10 Optical and Functional Coatings for Flexible Displays (Matthew Sousa and Gregory P. Crawford). 10.1 Introduction. 10.2 Thin Film Polarizers. 10.3 Thin Film Retarders. 10.4 Color Filters. 10.5 Alignment Layers. 10.6 Antireflective Coatings. 10.7 Summary. References. 11 Patterning Techniques and Semiconductor Materials for Flexible Electronics (John A. Rogers and Graciela Blanchet). 11.1 Introduction. 11.2 Large-Area Patterning Techniques. 11.3 Printable Semiconductors and Devices. 11.4 Prototype Circuits and Systems. 11.5 Conclusions. Acknowlegdements. References. 12 Printed Organic Electronics (Raj B. Apte, Robert A. Street, Ana Claudia Arias, Alberto Salleo, Michael Chabinyc, William S. Wong, Beng S. Ong Yiliang Wu, Ping Liu, and Sandra Gardner). 12.1 Introduction. 12.2 System Requirements. 12.3 Transistor Requirements. 12.4 Organic Semiconductors. 12.5 Digital Lithography. 12.6 Prospects. Acknowledgments. References. 13 Rollable Active Matrix Displays with Organic Electronics (Edzer Huitema, Gerwin Gelinck, Erik van Veenendaal, Fred Touwslager, and Pieter van Lieshout). 13.1 Introduction. 13.2 Flexible Display Overview. 13.3 Organic Electronics Technology. 13.4 Display Design and Processing. 13.5 Transistor Requirements. 13.6 Transistor Characteristics. 13.7 Functional Displays. 13.8 Driver Integration. Acknowledgment. References. 14 Awaiting Author Copy (Sigard Wagner). 15 OLED Displays on Plastic (Mark L. Hildner). 15.1 Introduction. 15.2 PLED Basics. 15.3 Plastic Substrates for OLED. 15.4 Substrate Processing Issues. 15.5 Passive Matrix Display Fabrication. 15.6 Active Matrix for OLED on Plastic. 15.7 Conclusion. Acknowledgments. References. 16 Encapsulated Liquid Crystal Materials for Flexible Display Applications (Gregory P. Crawford). 16.1 Introduction. 16.2 History of Encapsulated Liquid Crystals. 16.3 Encapsulation Techniques. 16.4 Conformed Polymer-Dispersed Liquid Crystals. 16.5 Holographic Polymer-Dispersed Liquid Crystals. 16.6 Prefabricated Templates Impregnated with Liquid Crystal. 16.7 Summary. References. 17 Cholesteric Liquid Crystals for Flexible Displays (J. William Doane and Asad Khan). 17.1 Introduction. 17.2 Basic Properties of Cholesteric Displays. 17.3 Drive Schemes, Chips and Circuitry. 17.4 Power Consumption. 17.5 Full Color. 17.6 Droplet Dispersions for Flexible Displays. 17.7 Toward Flexible Displays. 17.8 Conclusions. References. 18 Paintable LCDs: Single-Substrate LCDs Produced by Photoenforced Stratification (Roel Penterman, Stephen I. Klink, Joost Vogels, Edzer Huitema, Henk de Koning, and Dirk Broer). 18.1 Introduction. 18.2 Photoenforced Stratification. 18.3 Experimental Procedures. 18.4 Single UV exposure. 18.5 Two-step UV exposure. 18.6 Paintable Displays. 18.7 Improved Paintable LCD Technology. 18.8 Conclusion. Acknowledgments. References. 19 Electrophoretic Imaging Films for Electronic Paper Displays (Karl Amundson). 19.1 Introduction. 19.2 Scattering Imaging Films for Displays. 19.3 Electrophoresis and Electrophoretic Imaging. 19.4 Current Electrophoretic Display Development Efforts. 19.5 Flexible and Conformable EPID Displays. References. 20 Gyricon Materials for Flexible Displays (Nicolas Sheridon). 20.1 Introduction. 20.2 Electro-optical Response. 20.3 Image Storage. 20.4 Brightness and Contrast. 20.5 Addressing Methods. 20.6 Fabrication. 20.7 Conclusions. References. 21 Roll-to-Roll Manufacturing of Flexible Displays (Abbie Gregg, Lara York, and Mark Strnad). 21.1 Background. 21.2 Objective. 21.3 Device Scenario 21.4 Product Design. 21.5 Tools. 21.6 Device Inspection. 21.6.1 Darkfield technologies. 21.6.2 Batch web coater for EB deposition. 21.7 Die Punch for Alignment and Registration. 21.8 Evaporator: Thermal Cathode for LEP device. 21.9 Evaporator: OLED. 21.10 Exposure: Proximity. 21.11 Exposure: Step and Repeat. 21.12 Inkjet Deposition. 21.12.1 Litrex 140L inkjet system. 21.13 Lamination. 21.14 Laser Processing. 21.15 Roll Coater: Photoresist. 21.16 Screen Printer. 21.17 Oven for Low-Temperature Curing. 21.18 Sputtering. 21.19 Materials Discussion . 21.20 Thermal Budget for Plastic Substrates. 21.21 Interleaf or Slip Sheet. 21.22 Materials List. 21.23 Processing Issues. 21.24 Material Handling in Roll-to-Roll Processing. 21.25 Results from the Cost Model. Bibliography. 22 High-Resolution Full-Color Flexible TFT LCDs Based on Amorphous Silicon (Jin Jang, Sung Hwan Won, Bo Sung Kim, Mun Pyo Hong, and Kyu Ha Chung). 22.1 Introduction. 22.2 Effect of He Dilution on SiNx Deposition. 22.3 a-Si:H TFT on Plastic with an Organic Gate Insulator. 22.4 Fabrication of an a-Si:H TFT Array on Plastic. 22.5 a-Si:H TFT LCD on Plastic. References. 23 All-Plastic Color TFT LCDs Based on Low-Temperature Poly-Si (Akihiko Asano). 23.1 Introduction. 23.2 Overview of the Process. 23.3 Results of the Transfer Process. 23.4 Changes in TFT Characteristics with Substrate Bending. 23.5 Display Properties of Plastic LCDs. 23.6 Problems to Solve. 23.7 Summaries and Future Prospect. Acknowledgments. References. 24 TFT Transfer Technology (Sumio Utsunomiya, Satoshi Inoue, and Tatsuya Shimoda). 24.1 Introduction. 24.2 TFT Transfer Process Sequence. 24.3 Transfer Mechanism. 24.4 TFT Performance. 24.5 Applications. 24.6 Summary. References. 25 Markets and Applications of Flexible Displays (Kimberly Allen). 25.1 Introduction. 25.2 Why Flexible? 25.3 Supporting Technologies. 25.4 Flexible Display Technologies. 25.5 Market Forecast. 25.6 Regional Development. 25.7 Investment And Commitment . 25.8 What Will It Take? 25.9 Conclusion. References. Index.

Facile Synthesis of Silver Nanoparticles Useful for Fabrication of High-Conductivity Elements for Printed Electronics

Abstract: A facile synthesis of stable silver nanoparticles having a particle size of <10 nm is described. The synthesis involved reduction of silver acetate with a substituted hydrazine, such as PhNHNH2, in the presence of a 1-alkylamine, such as C16H33NH2, in toluene at 25−60 °C. Spin-coated thin films or printed electronic features of alkylamine-stabilized silver nanoparticles could be easily converted at 120−160 °C into highly conductive films or elements with conductivity of 2−4 × 104 S cm-1. Organic thin-film transistors with printed silver source/drain electrodes of this nature exhibited field-effect transistor properties which are similar to those of the devices using vacuum-deposited silver electrodes.

Solution-processed zinc oxide field-effect transistors based on self-assembly of colloidal nanorods.

Abstract: Colloidal zinc oxide (ZnO) nanocrystals are attractive candidates for a low-temperature and solution-processible semiconductor for high-performance thin-film field-effect transistors (TFTs). Here we show that by controlling the shape of the nanocrystals from spheres to rods the semiconducting properties of spin-coated ZnO films can be much improved as a result of increasing particle size and self-alignment of the nanorods along the substrate. Postdeposition hydrothermal growth in an aqueous zinc ion solution has been found to further enhance grain size and connectivity and improve device performance. TFT devices made from 65-nm-long and 10-nm-wide nanorods deposited by spin coating have been fabricated at moderate temperatures of 230 °C with mobilities of 0.61 cm2V-1s-1 and on/off ratios of 3 × 105 after postdeposition growth, which is comparable to the characteristics of TFTs fabricated by traditional sputtering methods.

GaN metal-oxide-semiconductor high-electron-mobility-transistor with atomic layer deposited Al2O3 as gate dielectric

Abstract: We report on a GaN metal-oxide-semiconductor high-electron-mobility-transistor (MOS-HEMT) using atomic-layer-deposited (ALD) Al2O3 as the gate dielectric. Compared to a conventional GaN high-electron-mobility-transistor (HEMT) of similar design, the MOS-HEMT exhibits several orders of magnitude lower gate leakage and several times higher breakdown voltage and channel current. This implies that the ALD Al2O3∕AlGaN interface is of high quality and the ALD Al2O3∕AlGaN∕GaN MOS-HEMT is of high potential for high-power rf applications. In addition, the high-quality ALD Al2O3 gate dielectric allows the effective two-dimensional (2D) electron mobility at the AlGaN∕GaN heterojunction to be measured under a high transverse field. The resulting effective 2D electron mobility is much higher than that typical of Si, GaAs or InGaAs metal-oxide-semiconductor field-effect-transistors (MOSFETs).

Current drive circuit and display device using same, pixel circuit, and drive method

Abstract: A display device including a current drive circuit capable of stably and correctly supplying an intended current to a light emitting element of each pixel without being affected by variations in characteristics of an active element inside the pixel and as a result capable of displaying a high quality image, wherein each pixel comprises a receiving use transistor TFT 3 for fetching a signal current Iw from a data line DATA when a scanning line SCAN-A is selected, a conversion use transistor TFT 1 for once converting a current level of a fetched signal current Iw to a voltage level and holding the same, and a drive use transistor TFT 2 for passing a drive current having a current level in accordance with the held voltage level through a light emitting element OLED. The conversion use thin film transistor TFT 1 generates a converted voltage level at its own gate by passing the signal current Iw fetched by the TFT 3 through its own channel. A capacitor C holds the voltage level created at the gate of the TFT 1 . The TFT 2 passes the drive current having a current level in accordance with the held voltage level through the light emitting element OLED.

Transparent thin-film transistors with zinc indium oxide channel layer

Abstract: High mobility, n-type transparent thin-film transistors (TTFTs) with a zinc indium oxide (ZIO) channel layer are reported. Such devices are highly transparent with ∼85% optical transmission in the visible portion of the electromagnetic spectrum. ZIO TTFTs annealed at 600 °C operate in depletion-mode with threshold voltages −20 to −10V and turn-on voltages ∼3V less than the threshold voltage. These devices have excellent drain current saturation, peak incremental channel mobilities of 45–55cm2V−1s−1, drain current on-to-off ratios of ∼106, and inverse subthreshold slopes of ∼0.8V∕decade. In contrast, ZIO TTFTs annealed at 300 °C typically operate in enhancement-mode with threshold voltages of 0–10V and turn-on voltages 1–2V less than the threshold voltage. These 300 °C devices exhibit excellent drain–current saturation, peak incremental channel mobilities of 10–30cm2V−1s−1, drain current on-to-off ratios of ∼106, and inverse subthreshold slopes of ∼0.3V∕decade. ZIO TTFTs with the channel layer deposited ne...

Guided growth of large-scale, horizontally aligned arrays of single-walled carbon nanotubes and their use in thin-film transistors.

Abstract: A convenient process for generating large-scale, horizontally aligned arrays of pristine, single-walled carbon nanotubes (SWNTs) is described. The approach uses guided growth, by chemical vapor deposition (CVD), of SWNTs on miscut single-crystal quartz substrates. Studies of the growth reveal important relationships between the density and alignment of the tubes, the CVD conditions, and the morphology of the quartz. Electrodes and dielectrics patterned on top of these arrays yield thin-film transistors that use the SWNTs as effective thin-film semiconductors. The ability to build high-performance devices of this type suggests significant promise for large-scale aligned arrays of SWNTs in electronics, sensors, and other applications.

High-performance organic thin-film transistors with metal oxide/metal bilayer electrode

Abstract: We demonstrate bilayer source-drain (S-D) electrodes for organic thin film transistors (OTFT). The bilayer consists of a transition metal oxide (MoO3,WO3, or V2O5) layer and a metal layer. The metal oxide layer, directly contacting the organic semiconducting layer, serves as the charge-injection layer. The overcoated metal layer is responsible for the conduction of charge carriers. We found that the metal oxide layer coupled between pentacene and metal layers played an important role in improving the field-effect transistor characteristics of OTFTs. Devices with the bilayer S-D electrodes showed enhanced hole-injection compared to those with only metal electrode. High field-effect mobility of 0.4cm2∕Vs and on/off current ratios of 104 were obtained in the pentacene based TFTs using the bilayer S-D electrodes at a gate bias of −40V. The improvement is attributed to the reduction in the contact barrier and the prevention of metal diffusion into the organic layer and/or unfavorable chemical reaction between ...

Indolo[3,2-b]carbazole-Based Thin-Film Transistors with High Mobility and Stability

Abstract: Proper functionalization of indolo[3,2-b]carbazole led to a new class of high-performance organic semiconductors suitable for organic thin-film transistor (OTFT) applications. While 5,11-diaryl-substituted indolo[3,2-b]carbazoles without long alkyl side chains provided amorphous thin films upon vacuum deposition, those with sufficiently long alkyl side chains such as 5,11-bis(4-octylphenyl)indolo[3,2-b]carbazole self-organized readily into highly crystalline layered structures under similar conditions. OTFTs using channel semiconductors of this nature exhibited excellent field-effect properties, with mobility up to 0.12 cm2 V-1 s-1 and current on/off ratio to 107. As this class of organic semiconductors has relatively low HOMO levels and large band gaps, they also displayed good environmental stability even with prolonged exposure to amber light, an appealing characteristic for OTFT applications.

HfO2 and Al2O3 gate dielectrics on GaAs grown by atomic layer deposition

Abstract: High-performance metal-oxide-semiconductor field effect transistors (MOSFETs) on III–V semiconductors have long proven elusive. High-permittivity (high-κ) gate dielectrics may enable their fabrication. We have studied hafnium oxide and aluminum oxide grown on gallium arsenide by atomic layer deposition. As-deposited films are continuous and predominantly amorphous. A native oxide remains intact underneath HfO2 during growth, while thinning occurs during Al2O3 deposition. Hydrofluoric acid etching prior to growth minimizes the final interlayer thickness. Thermal treatments at ∼600°C decompose arsenic oxides and remove interfacial oxygen. These observations explain the improved electrical quality and increased gate stack capacitance after thermal treatments.

Effect of Dielectric Roughness on Performance of Pentacene TFTs and Restoration of Performance with a Polymeric Smoothing Layer

Abstract: The morphology, structure, and transport properties of pentacene thin film transistors (TFTs) are reported showing the influence of the gate dielectric surface roughness Upon roughening of the amorphous SiO2 gate dielectric prior to pentacene deposition, dramatic reductions in pentacene grain size and crystallinity were observed The TFT performance of pentacene films deposited on roughened substrates showed reduced free carrier mobility, larger transport activation energies, and larger trap distribution widths Spin coating roughened dielectrics with polystyrene produced surfaces with 2 A root-mean-square (rms) roughness The pentacene films deposited on these coated surfaces had grain sizes, crystallinities, mobilities, and trap distributions that were comparable to the range of values observed for pentacene films deposited on thermally grown SiO2 (roughness also ∼2 A rms)

Thickness Dependence of Mobility in Pentacene Thin‐Film Transistors

Abstract: The dependence of the field-effect mobility of organic thin-film transistors (OTFT) was measured using top-contact devices. OTFTs were fabricated by vacuum sublimation of pentacene on thermally oxidized silicon wafers to form films with nominal thickness between 2 and 25 monolayers. The deposition was carried out at a low rate and the substrate was heated in order to yield high-quality films. The results indicate that the mobility saturates when 6 monolayers of pentacene are deposited on the gate dielectric, SiO2.

High-mobility Carbon-nanotube Thin-film Transistors on a Polymeric Substrate

Abstract: We report the development of high-mobility carbon-nanotube thin-film transistors fabricated on a polymeric substrate. The active semiconducting channel in the devices is composed of a random two-dimensional network of single-walled carbon nanotubes (SWNTs). The devices exhibit a field-effect mobility of 150cm2∕Vs and a normalized transconductance of 0.5mS∕mm. The ratio of on-current (Ion) to off-current (Ioff) is ∼100 and is limited by metallic SWNTs in the network. With electronic purification of the SWNTs and improved gate capacitance we project that the transconductance can be increased to ∼10–100mS∕mm with a significantly higher value of Ion∕Ioff, thus approaching crystalline semiconductor-like performance on polymeric substrates.

σ-π molecular dielectric multilayers for low-voltage organic thin-film transistors

Abstract: Very thin (2.3-5.5 nm) self-assembled organic dielectric multilayers have been integrated into organic thin-film transistor structures to achieve sub-1-V operating characteristics. These new dielectrics are fabricated by means of layer-by-layer solution phase deposition of molecular silicon precursors, resulting in smooth, nanostructurally well defined, strongly adherent, thermally stable, virtually pinhole-free, organosiloxane thin films having exceptionally large electrical capacitances (up to ≈2,500 nF·cm-2), excellent insulating properties (leakage current densities as low as 10-9 A·cm-2), and single-layer dielectric constant (k)of ≈16. These 3D self-assembled multilayers enable organic thin-film transistor function at very low source-drain, gate, and threshold voltages (<1 V) and are compatible with a broad variety of vapor- or solution-deposited p- and n-channel organic semiconductors. gate insulator molecular multilayer organic dielectric self-assembly

Field effect transistor with amorphous oxide active layer containing microcrystals and gate electrode opposed to active layer through gate insulator

Abstract: A novel amorphous oxide applicable, for example, to an active layer of a TFT is provided. The amorphous oxide comprises microcrystals.

Bendable single crystal silicon thin film transistors formed by printing on plastic substrates

Abstract: Bendable, high performance single crystal silicon transistors have been formed on plastic substrates using an efficient dry transfer printing technique. In these devices, free standing single silicon objects, which we refer to as microstructured silicon (μs‐Si), are picked up, using a conformable rubber stamp, from the top surface of a wafer from which they are generated. The μs‐Si is then transferred, to a specific location and with a controlled orientation, onto a thin plastic sheet. The efficiency of this method is demonstrated by the fabrication of an array of thin film transistors that exhibit excellent electrical properties: average device effective mobilities, evaluated in the linear regime, of ∼240cm2∕Vs, and threshold voltages near 0V. Frontward and backward bending tests demonstrate the mechanical robustness and flexibility of the devices.

Inorganic oxide core, polymer shell nanocomposite as a high K gate dielectric for flexible electronics applications.

Abstract: Organic/inorganic core shell nanoparticles have been synthesized using high K TiO2 as the core nanoparticle, and polystyrene as the shell. This material is easy to process and forms transparent continuous thin films, which exhibit a dielectric constant enhancement of over 3 times that of bulk polystyrene. This new dielectric material has been incorporated into capacitors and thin film transistors (TFTs). Mobilities approaching 0.2 cm2/V·s have been measured for pentacene TFTs incorporating the new TiO2 polystyrene nanostructured gate dielectric, indicating good surface properties for pentacene film growth. This novel strategy for generating high K flexible gate dielectrics will be of value in improving organic and flexible electronic device performance.

Self-aligned contacts for transistors

Abstract: Self-aligned contacts for transistors and methods for fabricating the contacts are described. An etch resistant material is patterned to create an opening that resides above a transistor gate structure. A selective etch is performed through the opening that does not etch the transistor gate structure but does etch material that resides laterally with respect to the transistor gate structure in order to expose tops, immediately adjacent to the transistor gate structure, of drain and source regions of a diffusion layer of the transistor. Conductive material is deposited that covers respective tops of the drain and source regions of the diffusion layer of the transistor to a depth that does not short the drain and source region of the diffusion layer of the transistor. A layer above the conductive material is formed. Contacts are formed through the layer above the conductive material to respective portions of the conductive material that cover respective tops of the drain and source regions of the diffusion layer of the transistor.