Showing papers on "Voltage published in 2004"

Highly scalable nonvolatile resistive memory using simple binary oxide driven by asymmetric unipolar voltage pulses

Abstract: Simple binary-TMO (transition metal oxide) resistive random access memory named as OxRRAM has been fully integrated with 0.18/spl mu/m CMOS technology, and its device as well as cell properties are reported for the first time. We confirmed that OxRRAM is highly compatible with the conventional CMOS process such that no other dedicated facility or process is necessary. Filamentary current paths, which are switched on or off by asymmetric unipolar voltage pulses, made the cell properties insensitive to cell or contact size promising high scalability. Also, OxRRAM showed excellent high temperature performance, even working at 300/spl deg/C without any significant degradation. With optimized TMO material and electrodes, OxRRAM operated successfully under 3V bias voltage and 2mA switching current at a TMO cell size smaller than 0.2/spl mu/m/sup 2/.

Simple direct power control of three-phase PWM rectifier using space-vector modulation (DPC-SVM)

Abstract: This paper proposes a novel and simple direct power control of three-phase pulsewidth-modulated (PWM) rectifiers with constant switching frequency using space-vector modulation (DPC-SVM). The active and reactive powers are used as the pulse width modulated (PWM) control variables instead of the three-phase line currents being used. Moreover, line voltage sensors are replaced by a virtual flux estimator. The theoretical principle of this method is discussed. The steady-state and dynamic results of DPC-SVM that illustrate the operation and performance of the proposed system are presented. It is shown that DPC-SVM exhibits several features, such as a simple algorithm, good dynamic response, constant switching frequency, and particularly it provides sinusoidal line current when supply voltage is not ideal. Results have proven excellent performance and verify the validity of the proposed system.

MEMS electrostatic micropower generator for low frequency operation

Abstract: This paper describes the analysis, simulation and testing of a microengineered motion-driven power generator, suitable for application in sensors within or worn on the human body. Micro-generators capable of powering sensors have previously been reported, but these have required high frequency mechanical vibrations to excite a resonant structure. However, body-driven movements are slow and irregular, with large displacements, and hence do not effectively couple energy into such generators. The device presented here uses an alternative, non-resonant operating mode. Analysis of this generator shows its potential for the application considered, and shows the possibility to optimise the design for particular conditions. An experimental prototype based on a variable parallel-plate capacitor operating in constant charge mode is described which confirms the analysis and simulation models. This prototype, when precharged to 30 V, develops an output voltage of 250 V, corresponding to 0.3J per cycle. The experimental test procedure and the instrumentation are also described.

A dual two-level inverter scheme with common mode voltage elimination for an induction motor drive

Abstract: Pulse-width modulated (PWM) inverters are known to generate common mode voltages which cause motor bearing currents in the induction motor drives. They also result in leakage currents which act as sources of conducted electromagnetic interference in the drive system. The common mode voltage generated by a conventional three-level inverter can be eliminated by switching only the voltage space vectors which do not produce the common mode voltage. This paper presents a PWM switching strategy to eliminate common mode voltage using the open-end winding configuration for the induction motor. The switching strategy presented in this paper, does not generate any alternating common mode voltages in the drive system and hence the electrostatic coupling of the common mode voltage, which results in the bearing currents and the leakage currents, is avoided. The proposed scheme is devoid of neutral point voltage fluctuations and does not require neutral point clamping diodes, when compared to the common mode elimination scheme based on the conventional three-level inverter topology. Also, the present scheme uses a single dc-link with half the voltage compared to the conventional three-level inverter based scheme.

Students’ understanding of direct current resistive electrical circuits

Abstract: Both high school and university students’ reasoning regarding direct current resistive electric circuits often differ from the accepted explanations. At present, there are no standard diagnostic tests on electric circuits. Two versions of a diagnostic instrument were developed, each consisting of 29 questions. The information provided by this test can provide instructors with a way of evaluating the progress and conceptual difficulties of their students. The analysis indicates that students, especially females, tend to hold multiple misconceptions, even after instruction. During interviews, the idea that the battery is a constant source of current was used most often in answering the questions. Students tended to focus on the current in solving problems and to confuse terms, often assigning the properties of current to voltage and/or resistance.

Theoretical and practical limits of dynamic voltage scaling

Abstract: Dynamic voltage scaling (DVS) is a popular approach for energy reduction of integrated circuits. Current processors that use DVS typically have an operating voltage range from full to half of the maximum Vdd. However, it is possible to construct designs that operate over a much larger voltage range: from full Vdd to subthreshold voltages. This possibility raises the question of whether a larger voltage range improves the energy efficiency of DVS. First, from a theoretical point of view, we show that for subthreshold supply voltages leakage energy becomes dominant, making "just in time completion" energy inefficient. We derive an analytical model for the minimum energy optimal voltage and study its trends with technology scaling. Second, we use the proposed model to study the workload activity of an actual processor and analyze the energy efficiency as a function of the lower limit of voltage scaling. Based on this study, we show that extending the voltage range below 1/2 Vdd will improve the energy efficiency for most processor designs, while extending this range to subthreshold operation is beneficial only for very specific applications. Finally, we show that operation deep in the subthreshold voltage range is never energy-efficient.

Razor: circuit-level correction of timing errors for low-power operation

Abstract: Dynamic voltage scaling is one of the more effective and widely used methods for power-aware computing. We present a DVS approach that uses dynamic detection and correction of circuit timing errors to tune processor supply voltage and eliminate the need for voltage margins

A complete solution to the harmonic elimination problem

Abstract: The problem of eliminating harmonics in a switching converter is considered. That is, given a desired fundamental output voltage, the problem is to find the switching times (angles) that produce the fundamental while not generating specifically chosen harmonics. In contrast to the well known work of Patel and Hoft and others, here all possible solutions to the problem are found. This is done by first converting the transcendental equations that specify the harmonic elimination problem into an equivalent set of polynomial equations. Then, using the mathematical theory of resultants, all solutions to this equivalent problem can be found. In particular, it is shown that there are new solutions that have not been previously reported in the literature. The complete solutions for both unipolar and bipolar switching patterns to eliminate the fifth and seventh harmonics are given. Finally, the unipolar case is again considered where the fifth, seventh, 11th, and 13th harmonics are eliminated along with corroborative experimental results.

Ambipolar light-emitting organic field-effect transistor

Abstract: We demonstrate a light-emitting organic field-effect transistor (OFET) with pronounced ambipolar current characteristics. The ambipolar transport layer is a coevaporated thin film of α-quinquethiophene (α-5T) as hole-transport material and N,N′-ditridecylperylene-3,4,9,10-tetracarboxylic diimide (P13) as electron-transport material. The light intensity is controlled by both the drain–source voltage VDS and the gate voltage VG. Moreover, the latter can be used to adjust the charge-carrier balance. The device structure serves as a model system for ambipolar light-emitting OFETs and demonstrates the general concept of adjusting electron and hole mobilities by coevaporation of two different organic semiconductors.

III-Phosphide and III-Arsenide flip chip light-emitting devices

Abstract: A light-emitting semiconductor device includes a stack of layers including an active region. The active region includes a semiconductor selected from the group consisting of III-Phosphides, III-Arsenides, and alloys thereof. A superstrate substantially transparent to light emitted by the active region is disposed on a first side of the stack. First and second electrical contacts electrically coupled to apply a voltage across the active region are disposed on a second side of the stack opposite to the first side. In some embodiments, a larger fraction of light emitted by the active region exits the stack through the first side than through the second side. Consequently, the light-emitting semiconductor device may be advantageously mounted as a flip chip to a submount, for example.

High-efficiency DC-DC converter with high voltage gain and reduced switch stress

Abstract: In this study, a high-efficiency DC-DC converter with high voltage gain and reduced switch stress is proposed. In the proposed topology, a three-winding coupled inductor is used for providing a high voltage gain without extreme switch duty-cycle and enhancing the utility rate of magnetic core. Moreover, the energy in the leakage inductor is released directly to the output terminal for avoiding the phenomenon of circulating current and the production of switch surge voltage. In addition, the delay time formed with the cross of primary and secondary currents of the coupled inductor is manipulated to alleviate the reverse-recovery current of the output diode. It can achieve the aim of high-efficiency power conversion. Furthermore, the closed-loop control methodology is utilized in the proposed scheme to overcome the voltage drift problem of the power source under the variation of loads. Some experimental results via an example of a proton exchange membrane fuel cell (PEMFC) power source with 250 watts nominal rating are given to demonstrate the effectiveness of the proposed power conversion strategy.

A supercapacitor-based energy storage substation for voltage compensation in weak transportation networks

Abstract: A supercapacitive-storage-based substation for the compensation of resistive voltage drops in transportation networks is proposed. It allows to feed as a current source in any voltage conditions of the line. The system has been designed as a compensation substation to be placed at weak points like end-of-line stations, instead of additional feeding substations. A dedicated power-electronic converter with an associated control system for the stabilization of the voltage level at the point of coupling in case of strong perturbations is proposed. Practical results are also presented, which have been recorded from a reduced size prototype.

Buck-boost DC-DC switching power conversion

Abstract: Apparatus operates at a power level within a range of power levels that includes a rated maximum power level of the apparatus. The apparatus includes circuit elements to deliver power at an output voltage to a load from a source at an input voltage using an inductor selectively connected between the source and the load during a power conversion cycle. The inductor conducts a current having an average positive value during the power conversion cycle. A first switching device is interposed between the source and a first terminal of the inductor. A second switching device is interposed between a second terminal of the inductor and the load. A switch controller turns ON the first switching device during a time interval within the power conversion cycle during which the current is negative.

Relation between space charge accumulation and partial discharge activity in enameled wires under PWM-like voltage waveforms

Abstract: It has been observed that voltage waveforms generated by power electronic converters may affect significantly the reliability of electric motor insulation. Since partial discharges are considered to be the main cause of the reliability loss, new enamel insulations for magnet wires are being developed in order to withstand better stress amplification. The electrical characterization of these insulating materials is often carried out through aging tests which may provide estimation of life under different stress levels and conditions. However, deeper investigation of aging phenomena due to supply voltage waveforms is needed, especially regarding the relation between aging factors and stress conditions. This paper deals with this topic, showing experimental evidences of relation between partial discharge quantities (e.g., inception voltage, repetition frequency, amplitude) and electrical properties, associated with charge accumulation, which can be directly evaluated through space charge measurements. Characterization of insulating materials and comparison of materials candidate for application in power electronic waveform environment can be carried out resorting to the methodology proposed here. This approach can provide, therefore, a useful feedback to wire manufacturers regarding, e.g., the choice of additive nature and enamel components for magnet wires in power-electronic controlled motors.

High-performance battery-pack power estimation using a dynamic cell model

Abstract: In some battery applications, such as in hybrid electric vehicles or battery electric vehicles, it is necessary to be able to estimate, in real time, the present available power that may be sourced by the battery pack. Similarly, in rechargeable packs, it may be necessary to know how much charging power the pack can accept. These values must be carefully calculated in such a way that the pack will not be damaged by over/under charge or voltage or by exceeding a design current or power limit. This paper describes a method that uses a dynamic cell model and state-of-charge side information to very accurately predict the battery-pack available power.

Z-source inverter for motor drives

Abstract: This paper presents a Z-Source inverter system and control for general-purpose motor drives. The Z-source inverter system employs a unique LC network in the DC link and a small capacitor on the AC side of the diode front end. By controlling the shoot-through duty cycle, the Z-source can produce any desired output AC voltage, even greater than the line voltage. As a result, the new Z-source inverter system provides ride-through capability under voltage sags, reduces line harmonics, improves power factor and reliability, and extends output voltage range. Analysis, simulation, and experimental results will be presented to demonstrate these new features.

SRAM leakage suppression by minimizing standby supply voltage

Abstract: Suppressing the leakage current in memories is critical in low-power design. By reducing the standby supply voltage (V/sub DD/) to its limit, which is the data retention voltage (DRV), leakage power can be substantially reduced. This paper explores how low DRV can be in a standard low leakage SRAM module and analyzes how DRV is affected by parameters such as process variations, chip temperature, and transistor sizing. An analytical model for DRV as a function of process and design parameters is presented, and forms the basis for further design space explorations. This model is verified using simulations as well as measurements from a 4 kB SRAM chip in a 0.13 /spl mu/m technology. It is demonstrated that an SRAM cell state can be preserved at sub-300 mV standby VDD, with more than 90% leakage power savings.

Optimal common-mode Voltage reduction PWM technique for inverter control with consideration of the dead-time effects-part I: basic development

Abstract: The objective of this paper is to investigate the optimal common-mode voltage reduction pulsewidth modulation (PWM) technique when dead-time effect is taken into account. The effect of dead time on common-mode voltage for inverter control and the associated solution are discussed. Based upon these results, an optimal common-mode voltage reduction PWM technique, which requires no extra voltage/current sensors and compensation mechanism while not being affected by the dead time, is recommended. The common-mode voltage can be reduced to one-third for the inverter with diode front end, which is widely used in industry. Intensive measured results are presented to fully support the claims.

Magnetic resonance imaging interference immune device

Abstract: A voltage compensation unit reduces the effects of induced voltages upon a device having a single wire line. The single wire line has balanced characteristic impedance. The voltage compensation unit includes a tunable compensation circuit connected to the wire line. The tunable compensation circuit applies supplemental impedance to the wire line. The supplemental impedance causes the characteristic impedance of the wire line to become unbalanced, thereby reducing the effects of induced voltages caused by changing magnetic fields.

A unified approach to solving the harmonic elimination equations in multilevel converters

Abstract: A method is presented to compute the switching angles in a multilevel converter so as to produce the required fundamental voltage while at the same time not generate higher order harmonics. Using a staircase fundamental switching scheme, previous work has shown that this is possible only for specific ranges of the modulation index. Here it is shown that, by considering all possible switching schemes, one can extend the lower range of modulation indices for which such switching angles exist. A unified approach is presented to solve the harmonic elimination equations for all of the various switching schemes. In particular, it is shown that all such schemes require solving the same set of equations where each scheme is distinguished by the location of the roots of the harmonic elimination equations. In contrast to iterative numerical techniques, the approach here produces all possible solutions.

Application of RBF neural network to fault classification and location in transmission lines

Abstract: The application of radial basis function (RBF) neural networks for fault classification and location in transmission lines is presented. Instantaneous current/voltage samples have been used as inputs to artificial neural networks (ANNs). Whereas, for fault classification, prefault and postfault samples of only the three-phase currents are sufficient, for fault location, postfault samples of both currents and voltages of the three phases are necessary. To validate the proposed approach simulation studies have been carried out on two simulated power-system models: one in which the transmission line is fed from one end and another, in which the transmission line is fed from both ends. The models are subjected to different types of faults at different operating conditions for variations in fault location, fault inception angle and fault point resistance. The results of the simulation studies which are presented confirm the feasibility of the proposed approach.

Description of bipolar charge transport in polyethylene using a fluid model with a constant mobility: model prediction

Abstract: We present a conduction model aimed at describing bipolar transport and space charge phenomena in low density polyethylene under dc stress. In the first part we recall the basic requirements for the description of charge transport and charge storage in disordered media with emphasis on the case of polyethylene. A quick review of available conduction models is presented and our approach is compared with these models. Then, the bases of the model are described and related assumptions are discussed. Finally, results on external current, trapped and free space charge distributions, field distribution and recombination rate are presented and discussed, considering a constant dc voltage, a step-increase of the voltage, and a polarization–depolarization protocol for the applied voltage. It is shown that the model is able to describe the general features reported for external current, electroluminescence and charge distribution in polyethylene.

NAND memory array incorporating multiple write pulse programming of individual memory cells and method for operation of same

Abstract: An exemplary NAND string memory array provides for capacitive boosting of a half-selected memory cell channel to reduce program disturb effects of the half selected cell. To reduce the effect of leakage current degradation of the boosted level, multiple programming pulses of a shorter duration are employed to limit the time period during which such leakage currents may degrade the voltage within the unselected NAND strings. In addition, multiple series select devices at one or both ends of each NAND string further ensure reduced leakage through such select devices, for both unselected and selected NAND strings. In certain exemplary embodiments, a memory array includes series-connected NAND strings of memory cell transistors having a charge storage dielectric, and includes more than one plane of memory cells formed above a substrate.

Inverter apparatus connected to a plurality of direct current power sources and dispersed-power-source system having inverter apparatus linked to commercial power system to operate

Abstract: An inverter apparatus (4) includes a plurality of converters (5A-5D) each receiving a direct current power from respective plurality of solar cell arrays (2A-2D) having different output voltage ranges, and an inverter (6) transforming the direct current power from the plurality of converters (5A-5D) into an alternating current power and allowing the alternating current power to reversely flow into a commercial power system (10). The plurality of converters (5A-5D) have different voltage input ranges corresponding to the output voltage ranges of the plurality of solar cell arrays (2A-2D), and each control, based on a pulse frequency modulation control signal received from a corresponding converter control unit, an output voltage of corresponding one of the plurality of solar cell arrays (2A-2D), so that an output power from corresponding one of the plurality of solar cell arrays (2A-2D) becomes maximum.

H/sup /spl infin// repetitive control of DC-AC converters in microgrids

Abstract: This paper proposes a voltage controller design method for DC-AC converters supplying power to a microgrid, which is also connected to the power grid. This converter is meant to operate in conjunction with a small power generating unit. The design of the output voltage controller is based on H/sup /spl infin// and repetitive control techniques. This leads to a very low harmonic distortion of the output voltage, even in the presence of nonlinear loads and/or grid distortions. The output voltage controller contains an infinite-dimensional internal model, which enables it to reject all periodic disturbances which have the same period as the grid voltage, and whose highest frequency components are up to approximately 1.5 kHz.

Charge control circuit

Abstract: A charge control circuit includes a switch circuit having an input node configured to receive a reference voltage at a selected voltage level and configured to respond to a charge signal to pre-charge the input node with a pulse charge at the selected voltage level. The switch circuit further includes a single switch configured to respond to an enable signal having a duration shorter than a mechanical time constant of a micro-electro mechanical device (MEM device) having a variable capacitor with first and second plates and wherein the single switch is coupled to the MEM device to apply the selected voltage level across first and second plates of a variable capacitor of the MEM device for the duration to thereby cause the pulse charge to accumulate on the variable capacitor.

Technique for online prediction of voltage collapse

Abstract: A new technique for predicting voltage collapse in power systems in an online mode is described. This technique uses the voltage magnitude and voltage angle information at buses and the network admittance matrix to predict voltage collapse. The performance of the technique was studied for a variety of operating conditions. The technique was tested using different IEEE test systems. The simulations were carried out for steady-state voltage collapses and for dynamic voltage collapses. The results indicate that, for every bus in the system, the proposed technique can predict its proximity to voltage collapse by means of an index. This method is computationally efficient and suitable for real time prediction of voltage collapse. An online implementation of the technique using UCA is also proposed.

An innovative digital control architecture for low-Voltage, high-current DC-DC converters with tight voltage regulation

Abstract: This paper describes an innovative digital control architecture for low-voltage, high-current dc-dc converters, based on a combination of current-programmed control and variable frequency operation. The key feature of the proposed architecture is the low complexity: only two digital-to-analog converters (DACs) with low resolution (7-b) are used for control. An original control algorithm is used to reduce quantization effects to negligible levels, in spite of the low resolution of the DACs. Thanks to this algorithm, both static and dynamic output voltage regulation are improved with respect to traditional digital solutions. Adaptive voltage positioning and active current sharing are inherently provided by the new architecture. A detailed description of the control strategy is given with reference to a single-phase buck converter. Extension to multiphase converters is straightforward. The digital control architecture is experimentally verified on a FPGA-based four-phase prototype buck converter operating at 350 kHz/phase. Output voltage tolerance within /spl plusmn/0.5% is experimentally demonstrated, along with negligible quantization effects and fast transient response. The features and the performance of the proposed architecture make it a valuable candidate for the control of next generation voltage regulator modules.

Effect of Porosity on the Capacity Fade of a Lithium-Ion Battery Theory

Abstract: A mathematical model is presented to predict the performance of a lithium-ion battery. It includes the changes in the porosity of the material due to the reversible intercalation processes and the irreversible parasitic reaction. The model was also extended to predict the capacity fade in a lithium-ion battery based on the unwanted parasitic reaction that consumes along with the changes in the porosities of the electrodes with cycling due to the continuous parasitic side reaction. The model can be used to predict the drop in the voltage profile, change in the state of charge, and the effects of charge and discharge rates during cycling. © 2004 The Electrochemical Society. All rights reserved.