J
Jun Fan
Researcher at Missouri University of Science and Technology
Publications - 505
Citations - 7033
Jun Fan is an academic researcher from Missouri University of Science and Technology. The author has contributed to research in topics: Printed circuit board & Equivalent circuit. The author has an hindex of 36, co-authored 482 publications receiving 5641 citations. Previous affiliations of Jun Fan include Ulsan National Institute of Science and Technology & University of Missouri.
Papers
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Proceedings ArticleDOI
Causality and delay and physics in real systems
M. Tsiklauri,Mikhail Zvonkin,Jun Fan,James L. Drewniak,Qinghuabill Chen,Alexander G. Razmadze +5 more
TL;DR: In this article, different methodologies for checking or enforcing causality in both time and frequency domain are discussed and a causality metric for measuring causality violation is introduced, and a small perturbation of nonlinear portion of the phase can fix the non-causal anomaly.
Proceedings ArticleDOI
A concise multiple scattering method for via array analysis in a circular plate pair
TL;DR: In this article, an admittance matrix is derived for the via ports at the top/bottom surfaces of the via holes, where the magnetic frill currents are expressed as cylindrical waves.
Journal ArticleDOI
A Decomposition Method for MIMO OTA Performance Evaluation
TL;DR: The parameters obtained by this decomposition method are significant for discovering the imperfections, for debugging, and for improving the design of the devices.
Journal ArticleDOI
A Novel RFI Mitigation Method Using Source Rotation
Qiaolei Huang,Ling Zhang,Jagan Rajagopalan,Deepak Pai,Chen Chen,Amit Gaikwad,Chulsoon Hwang,Jun Fan +7 more
TL;DR: In this article, the authors proposed a novel radio frequency interference mitigation method and applied it to a real consumer electronic device by determining the relationship between the dipole moment and the antenna near field, the noise source is rotated by a certain angle to reduce RFI.
Journal ArticleDOI
Equivalent Circuit Modeling of Dielectric Hysteresis Loops in Through Silicon Vias
TL;DR: In this paper, a numerical solution of the nonlinear equations that describe the hysteretic behavior of the coupling capacitance among through silicon vias in three-dimensional integrated circuits is proposed.