Journal ArticleDOI
A 0.9 V 92 dB Double-Sampled Switched-RC Delta-Sigma Audio ADC
Min Gyu Kim,Gil-Cho Ahn,Pavan Kumar Hanumolu,Sang-Hyeon Lee,Sang-Ho Kim,Seung-Bin You,Jae-Whui Kim,Gabor C. Temes,Un-Ku Moon +8 more
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TLDR
A new method using a combination of a switched-RC technique and a floating switched-capacitor double-sampling configuration enabled low-voltage operation without clock boosting or bootstrapping, and a three-level quantizer with simple dynamic element matching was used to improve linearity.Abstract:
A 0.9 V third-order double-sampled delta-sigma audio ADC is presented. A new method using a combination of a switched-RC technique and a floating switched-capacitor double-sampling configuration enabled low-voltage operation without clock boosting or bootstrapping. A three-level quantizer with simple dynamic element matching was used to improve linearity. The prototype IC implemented in a 0.13 CMOS process achieves 92 dB DR, 91 dB SNR and 89 dB SNDR in a 24 kHz audio signal bandwidth, while consuming 1.5 mW from a 0.9 V supply. The prototype operates from 0.65 V to 1.5 V supply with minimal performance degradation.read more
Citations
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Journal ArticleDOI
Low Voltage, Low Power, Inverter-Based Switched-Capacitor Delta-Sigma Modulator
Youngcheol Chae,Gunhee Han +1 more
TL;DR: An inverter-based SC circuit and its application to low-voltage, low-power delta-sigma (DeltaSigma) modulators is proposed and the prototype DeltaSigma modulators achieved high power efficiency maintaining sufficient performances for practical applications.
Journal ArticleDOI
Sigma-Delta Modulators: Tutorial Overview, Design Guide, and State-of-the-Art Survey
TL;DR: A review of the state of the art on nanometer CMOS implementations is described, giving a survey of cutting-edge ΣΔ architectures, with emphasis on their application to the next generation of wireless telecom systems.
Journal ArticleDOI
Power Reduction in Continuous-Time Delta-Sigma Modulators Using the Assisted Opamp Technique
Shanthi Pavan,Prabu Sankar +1 more
TL;DR: The “assisted opamp” integrator is introduced, which is a way of achieving low distortion operation with low power consumption and circuit implementations of the technique for single-bit modulators using NRZ and switched-capacitor-resistor feedback DACs are presented.
Journal ArticleDOI
A 0.8-V 230- $\mu$ W 98-dB DR Inverter-Based $\Sigma \Delta$ Modulator for Audio Applications
TL;DR: An on-chip body bias is used to compensate the performance degradation of the inverter at a slow process corner or low supply voltage, which demonstrates that the gain-boost class-C inverter is particularly suitable for low-voltage micro-power high-resolution applications.
Journal ArticleDOI
A 0.6-V 82-dB 28.6- $\mu$ W Continuous-Time Audio Delta-Sigma Modulator
TL;DR: The design of a low-voltage low-power fourth-order single-bit continuous-time Delta-Sigma modulator, implemented in a 0.13-μm standard CMOS technology with a core area of 0.11 mm2, achieves an 82-dB dynamic range (DR), and a 79.1-dB peak signal-to-noise and distortion ratio (SNDR) over a 20-kHz signal bandwidth.
References
More filters
Journal ArticleDOI
A 1.5-V, 10-bit, 14.3-MS/s CMOS pipeline analog-to-digital converter
A.M. Abo,Paul R. Gray +1 more
TL;DR: In this paper, a 1.5-V, 10-bit, 14.3-MS/s pipeline analog-to-digital converter was implemented in a 0.6/spl mu/m CMOS technology.
Journal ArticleDOI
Switched-opamp: an approach to realize full CMOS switched-capacitor circuits at very low power supply voltages
Jan Crols,Michiel Steyaert +1 more
TL;DR: In this article, a switch-opamp-based low-voltage analog CMOS filter was implemented in a 2.4-/spl mu/m CMOS process with V/sub T/=/spl plusmn/0.9 V.
Journal ArticleDOI
A 900-mV low-power /spl Delta//spl Sigma/ A/D converter with 77-dB dynamic range
TL;DR: In this paper, the design of a low-voltage and low-power /spl Delta/spl Sigma/ analog-to-digital (A/D) converter is presented.
Journal ArticleDOI
An experimental 1.5-V 64-Mb DRAM
Y. Nakagome,Tanaka Haruhiko,Kan Takeuchi,E. Kume,Y. Watanabe,Toru Kaga,Yoshifumi Kawamoto,Fumio Murai,R. Izawa,Digh Hisamoto,T. Kisu,Takashi Nishida,Eiji Takeda,K. Itoh +13 more
TL;DR: In this paper, an accurate and speed-enhanced half-V/sub CC/ voltage generator with a current-mirror amplifier and tri-state buffer is proposed to reduce data transmission delay.
Journal ArticleDOI
A 1-V 140-/spl mu/W 88-dB audio sigma-delta modulator in 90-nm CMOS
TL;DR: In this paper, a single-loop third-order switched-capacitor /spl Sigma/-/spl Delta/ modulator in 90-nm standard digital CMOS technology is presented, which is intended to minimize the power consumption in a lowvoltage environment.
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Low Voltage, Low Power, Inverter-Based Switched-Capacitor Delta-Sigma Modulator
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