Proceedings ArticleDOI
A 3us wake-up time nonvolatile processor based on ferroelectric flip-flops
Yiqun Wang,Yongpan Liu,Shuangchen Li,Daming Zhang,Bo Zhao,Mei-Fang Chiang,Yanxin Yan,Baiko Sai,Huazhong Yang +8 more
- pp 149-152
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TLDR
A fabricated nonvolatile processor based on ferroelectric flip-flops can operate continuously even under power failures occurring at 20 KHz and will provide a new level of support to chip-level fine-grained power management and energy harvesting applications.Abstract:
Nonvolatile processors offer a number of desirable properties including instant on/off, zero standby power and resilience to power failures. This paper presents a fabricated nonvolatile processor based on ferroelectric flip-flops. These flipflops are used in a distributed fashion and are able to maintain system states without any power supply indefinitely. An efficient controller is employed to achieve parallel reads and writes to the flip-flops. A reconfigurable voltage detection system is designed for automatic system backup during power failures. Measurement results show that this nonvolatile processor can operate continuously even under power failures occurring at 20 KHz. It can backup system states within 7μs and restore them within 3 μs. Such capabilities will provide a new level of support to chip-level fine-grained power management and energy harvesting applications.read more
Citations
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Proceedings ArticleDOI
An Energy Efficient Non-Volatile Flip-Flop based on CoMET Technology
Robert Perricone,Zhaoxin Liang,Meghna G. Mankalale,Michael Niemier,Sachin S. Sapatnekar,Jian-Ping Wang,X. Sharon Hu +6 more
TL;DR: This work proposes a non-volatile flip-flop (NVFF) based on CoMET technology that is capable of achieving up to two orders of magnitude less write energy than CMOS, making it especially attractive to architectures that require frequent backup operations.
Journal ArticleDOI
Intermittent Computing Emulation of Ultralow-Power Processors: Evaluation of Backup Strategies for RISC-V
TL;DR: In this article , the authors introduce different processor state state backup strategies based on an interrupt-based software approach, which do not need modifications to the microarchitecture of existing processors.
Patent
Configuration bit sequencing control of nonvolatile domain and array wakeup and backup
TL;DR: In this paper, the order in which non-volatile logic element array domains are restored or backed up is controlled by instructions from nonvolatile arrays of the first enabled of a plurality of non-vvolatile array domains.
Journal ArticleDOI
CapOS: Capacitor Error Resilience for Energy Harvesting Systems
TL;DR: The experimental results demonstrate that CapOS can effectively address the capacitor error of energy harvesting systems at a low run-time cost, without compromising the recovery of power outages.
Proceedings ArticleDOI
Dual-threshold directed execution progress maximization for nonvolatile processors
TL;DR: A dual-threshold method is proposed to maximize execution progress by enabling a system to hibernate to wait for power resumption instead of backing up data directly upon power interruptions and shows an average of up to 82.3% reduction on power failures and 1.5x speedup for forwarding progress by the proposed dual-Threshold method compared to the conventional single threshold scheme.
References
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Proceedings ArticleDOI
A compression-based area-efficient recovery architecture for nonvolatile processors
Yiqun Wang,Yongpan Liu,Yumeng Liu,Daming Zhang,Shuangchen Li,Baiko Sai,Mei-Fang Chiang,Huazhong Yang +7 more
TL;DR: A compare and compress recovery architecture, consisting of a parallel run-length codec (PRLC) and a state table logic, to reduce the area of nonvolatile registers and a heuristic vector selecting algorithm, which can provide over 42% better register number reduction than other vector selecting approaches.
Proceedings ArticleDOI
A non-volatile microcontroller with integrated floating-gate transistors
TL;DR: Experiments indicate that the proposed architecture has minimal impact on normal operation while enabling all processor state to be preserved across an unexpected power interruption, and careful system-level optimizations to hide expensive non-volatile operations are evaluated.
Proceedings ArticleDOI
A compare-and-write ferroelectric nonvolatile flip-flop for energy-harvesting applications
TL;DR: A novel compare-and-write ferroelectric nonvolatile flip-flop is developed, which can be used in the checkpoint processor for energy-harvesting applications and can make the processornonvolatile, secure and instant recoverable from power failures.