Proceedings ArticleDOI
A 3us wake-up time nonvolatile processor based on ferroelectric flip-flops
Yiqun Wang,Yongpan Liu,Shuangchen Li,Daming Zhang,Bo Zhao,Mei-Fang Chiang,Yanxin Yan,Baiko Sai,Huazhong Yang +8 more
- pp 149-152
Reads0
Chats0
TLDR
A fabricated nonvolatile processor based on ferroelectric flip-flops can operate continuously even under power failures occurring at 20 KHz and will provide a new level of support to chip-level fine-grained power management and energy harvesting applications.Abstract:
Nonvolatile processors offer a number of desirable properties including instant on/off, zero standby power and resilience to power failures. This paper presents a fabricated nonvolatile processor based on ferroelectric flip-flops. These flipflops are used in a distributed fashion and are able to maintain system states without any power supply indefinitely. An efficient controller is employed to achieve parallel reads and writes to the flip-flops. A reconfigurable voltage detection system is designed for automatic system backup during power failures. Measurement results show that this nonvolatile processor can operate continuously even under power failures occurring at 20 KHz. It can backup system states within 7μs and restore them within 3 μs. Such capabilities will provide a new level of support to chip-level fine-grained power management and energy harvesting applications.read more
Citations
More filters
Journal ArticleDOI
From Less Batteries to Battery-Less Alert Systems with Wide Power Adaptation down to nWs—Toward a Smarter, Greener World
TL;DR: This survey reviews the state of the art of IoT devices at the low-energy end of the scale: battery-light and battery-less sensor nodes and proposes battery indifferent architectures.
Journal ArticleDOI
Memory that never forgets: emerging nonvolatile memory and the implication for architecture design
TL;DR: This paper presents a meta-modelling architecture that automates the very labor-intensive and therefore time-heavy and expensive and therefore expensive and expensive process of computer programming called “slave-to-slave” computing.
Journal ArticleDOI
ENZYME: An Energy-Efficient Transient Computing Paradigm for Ultralow Self-Powered IoT Edge Devices
Chen Pan,Mimi Xie,Jingtong Hu +2 more
TL;DR: A software paradigm, ENZYME, to improve the energy efficiency of edge devices for transient computing with ultralow energy harvesting power supplies and is integrated into low-power IoT edge devices easily and efficiently.
Proceedings ArticleDOI
CoSpec: Compiler Directed Speculative Intermittent Computation
TL;DR: CoSpec is presented, a new architecture/compiler co-design scheme that works for commodity in-order processors used in energy-harvesting systems and achieves crash consistency without requiring unconventional architectural support, achieving a speedup of more than 1.2X when there is no power outage.
Journal ArticleDOI
Designing Energy-Efficient Intermittently Powered Systems Using Spin-Hall-Effect-Based Nonvolatile SRAM
Arnab Raha,Akhilesh Jaiswal,Syed Shakib Sarwar,Hrishikesh Jayakumar,Vijay Raghunathan,Kaushik Roy +5 more
TL;DR: A novel Spin Hall Effect-based nonvolatile-SRAM (SNVRAM) bit-cell that combines the nonvolatility of spin devices with the speed and energy efficiency of conventional 6T SRAM cells is proposed.
References
More filters
Proceedings ArticleDOI
A compression-based area-efficient recovery architecture for nonvolatile processors
Yiqun Wang,Yongpan Liu,Yumeng Liu,Daming Zhang,Shuangchen Li,Baiko Sai,Mei-Fang Chiang,Huazhong Yang +7 more
TL;DR: A compare and compress recovery architecture, consisting of a parallel run-length codec (PRLC) and a state table logic, to reduce the area of nonvolatile registers and a heuristic vector selecting algorithm, which can provide over 42% better register number reduction than other vector selecting approaches.
Proceedings ArticleDOI
A non-volatile microcontroller with integrated floating-gate transistors
TL;DR: Experiments indicate that the proposed architecture has minimal impact on normal operation while enabling all processor state to be preserved across an unexpected power interruption, and careful system-level optimizations to hide expensive non-volatile operations are evaluated.
Proceedings ArticleDOI
A compare-and-write ferroelectric nonvolatile flip-flop for energy-harvesting applications
TL;DR: A novel compare-and-write ferroelectric nonvolatile flip-flop is developed, which can be used in the checkpoint processor for energy-harvesting applications and can make the processornonvolatile, secure and instant recoverable from power failures.