Proceedings ArticleDOI
A 3us wake-up time nonvolatile processor based on ferroelectric flip-flops
Yiqun Wang,Yongpan Liu,Shuangchen Li,Daming Zhang,Bo Zhao,Mei-Fang Chiang,Yanxin Yan,Baiko Sai,Huazhong Yang +8 more
- pp 149-152
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TLDR
A fabricated nonvolatile processor based on ferroelectric flip-flops can operate continuously even under power failures occurring at 20 KHz and will provide a new level of support to chip-level fine-grained power management and energy harvesting applications.Abstract:
Nonvolatile processors offer a number of desirable properties including instant on/off, zero standby power and resilience to power failures. This paper presents a fabricated nonvolatile processor based on ferroelectric flip-flops. These flipflops are used in a distributed fashion and are able to maintain system states without any power supply indefinitely. An efficient controller is employed to achieve parallel reads and writes to the flip-flops. A reconfigurable voltage detection system is designed for automatic system backup during power failures. Measurement results show that this nonvolatile processor can operate continuously even under power failures occurring at 20 KHz. It can backup system states within 7μs and restore them within 3 μs. Such capabilities will provide a new level of support to chip-level fine-grained power management and energy harvesting applications.read more
Citations
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Journal ArticleDOI
Non-Volatile Logic Design Considerations for Energy Efficient Tolerant Variation
TL;DR: In this paper , a new method called the novel method is introduced for flawless energy drivers for given results, the design for the backup time determination and to reduce the energy wastage are mentioned.
Proceedings ArticleDOI
Challenges and opportunities with spin-based logic
TL;DR: This paper provides a short overview of efforts to process information with spin as a state variable and highlights more recent work where spintronic logic and memory devices are considered in the context of information processing hardware for the internet of things.
Journal ArticleDOI
Reliable and Efficient Parallel Checkpointing Framework for Nonvolatile Processor With Concurrent Peripherals
TL;DR: In this article , the authors propose an NVP architecture enabling hybrid checkpointing and efficient peripheral recovery, which addresses the recovery problem of both peripherals and interrupts efficiently in an intermittent system powered by ambient energy harvesting.
Proceedings ArticleDOI
Checkpointing-aware Data Allocation for Energy Harvesting Powered Non-volatile Processors
TL;DR: This work proposes a checkpointing-aware data allocation method to reduce the total cost of checkpointing and program execution without the inconsistency errors, and the experimental results show that the proposed method achieves 71.2% dynamic energy consumption reduction and 9.9% reduction of total checkpointingand program execution time on average.
Proceedings ArticleDOI
Efficient Checkpoint under Unstable Power Supplies on NVM based Devices
TL;DR: Wang et al. as discussed by the authors proposed an automatic checkpoint mechanism that can reduce NVM write wear, where the checkpoint trigger code is instrumented into every basic block to achieve automatic runtime checkpoint activation and when the program triggers checkpoint, the checkpoint procedure incrementally updates program state's backup to reduce redundant NVM writes.
References
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Proceedings ArticleDOI
A compression-based area-efficient recovery architecture for nonvolatile processors
Yiqun Wang,Yongpan Liu,Yumeng Liu,Daming Zhang,Shuangchen Li,Baiko Sai,Mei-Fang Chiang,Huazhong Yang +7 more
TL;DR: A compare and compress recovery architecture, consisting of a parallel run-length codec (PRLC) and a state table logic, to reduce the area of nonvolatile registers and a heuristic vector selecting algorithm, which can provide over 42% better register number reduction than other vector selecting approaches.
Proceedings ArticleDOI
A non-volatile microcontroller with integrated floating-gate transistors
TL;DR: Experiments indicate that the proposed architecture has minimal impact on normal operation while enabling all processor state to be preserved across an unexpected power interruption, and careful system-level optimizations to hide expensive non-volatile operations are evaluated.
Proceedings ArticleDOI
A compare-and-write ferroelectric nonvolatile flip-flop for energy-harvesting applications
TL;DR: A novel compare-and-write ferroelectric nonvolatile flip-flop is developed, which can be used in the checkpoint processor for energy-harvesting applications and can make the processornonvolatile, secure and instant recoverable from power failures.