Proceedings ArticleDOI
A 3us wake-up time nonvolatile processor based on ferroelectric flip-flops
Yiqun Wang,Yongpan Liu,Shuangchen Li,Daming Zhang,Bo Zhao,Mei-Fang Chiang,Yanxin Yan,Baiko Sai,Huazhong Yang +8 more
- pp 149-152
Reads0
Chats0
TLDR
A fabricated nonvolatile processor based on ferroelectric flip-flops can operate continuously even under power failures occurring at 20 KHz and will provide a new level of support to chip-level fine-grained power management and energy harvesting applications.Abstract:
Nonvolatile processors offer a number of desirable properties including instant on/off, zero standby power and resilience to power failures. This paper presents a fabricated nonvolatile processor based on ferroelectric flip-flops. These flipflops are used in a distributed fashion and are able to maintain system states without any power supply indefinitely. An efficient controller is employed to achieve parallel reads and writes to the flip-flops. A reconfigurable voltage detection system is designed for automatic system backup during power failures. Measurement results show that this nonvolatile processor can operate continuously even under power failures occurring at 20 KHz. It can backup system states within 7μs and restore them within 3 μs. Such capabilities will provide a new level of support to chip-level fine-grained power management and energy harvesting applications.read more
Citations
More filters
Journal ArticleDOI
Communication-Aware Task Scheduling for Energy-Harvesting Nonvolatile Processors
Yan Wang,Jinhui Liu,Jingtong Hu +2 more
TL;DR: This article proposes a novel communication-aware task-scheduling technique that first selects one or more executable tasks to be performed based on the task benefits and then calls a task partitioning algorithm to dynamically divide the scheduled tasks.
Proceedings ArticleDOI
A low-power subthreshold-to-superthreshold level-shifter for sub-0.5V embedded resistive RAM (ReRAM) macro in ultra low-voltage chips
Meng-Fan Chang,Che-Wei Wu,Jui-Yu Hung,Ya-Chin King,Chomg-Jung Lin,Mon-Shu Ho,Chia-Cheng Kuo,Shyh-Shyuan Sheu +7 more
TL;DR: This study proposes a pseudo-diode-mirrored (PDM) LS to achieve low VDDL, while maintaining a small DC current in an embedded ReRAM macro, which achieved 0.1V minimum-VDDL at VDDH=2V.
Posted Content
Enabling Failure-resilient Intermittent Systems Without Runtime Checkpointing.
TL;DR: In this article, the authors present a design which overcomes the drawbacks of checkpointing-based approaches, to enable failure-resilient intermittent systems by enforcing the serializability of concurrent task execution to improve computation progress and ensuring data consistency without system suspension during runtime.
Proceedings ArticleDOI
Design Insights of Non-volatile Processors and Accelerators in Energy Harvesting Systems
Keni Qiu,Mengying Zhao,Zhenge Jia,Jingtong Hu,Chun Jason Xue,Kaisheng Ma,Xueqing Li,Yongpan Liu,Vijaykrishnan Narayanan +8 more
TL;DR: This paper overviews the recent studies of NVP and NVA across the layers of hardware, architecture, software and their co-design, and presents the design insights of how the state-of-the-art works adapt their specific designs to the intermittent and fluctuating power conditions with the energy harvesting technology.
Journal ArticleDOI
IAA: Incidental Approximate Architectures for Extremely Energy-Constrained Energy Harvesting Scenarios using IoT Nonvolatile Processors
Kaisheng Ma,Jinyang Li,Xueqing Li,Yongpan Liu,Yuan Xie,Mahmut Kandemir,Jack Sampson,Vijaykrishnan Narayanan +7 more
TL;DR: A combination of approximate computing and intermittent computing-incidental approximate architecture to suit nonvolatile processors (NVPs) is explored.
References
More filters
Proceedings ArticleDOI
A compression-based area-efficient recovery architecture for nonvolatile processors
Yiqun Wang,Yongpan Liu,Yumeng Liu,Daming Zhang,Shuangchen Li,Baiko Sai,Mei-Fang Chiang,Huazhong Yang +7 more
TL;DR: A compare and compress recovery architecture, consisting of a parallel run-length codec (PRLC) and a state table logic, to reduce the area of nonvolatile registers and a heuristic vector selecting algorithm, which can provide over 42% better register number reduction than other vector selecting approaches.
Proceedings ArticleDOI
A non-volatile microcontroller with integrated floating-gate transistors
TL;DR: Experiments indicate that the proposed architecture has minimal impact on normal operation while enabling all processor state to be preserved across an unexpected power interruption, and careful system-level optimizations to hide expensive non-volatile operations are evaluated.
Proceedings ArticleDOI
A compare-and-write ferroelectric nonvolatile flip-flop for energy-harvesting applications
TL;DR: A novel compare-and-write ferroelectric nonvolatile flip-flop is developed, which can be used in the checkpoint processor for energy-harvesting applications and can make the processornonvolatile, secure and instant recoverable from power failures.