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Proceedings ArticleDOI

A 3us wake-up time nonvolatile processor based on ferroelectric flip-flops

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TLDR
A fabricated nonvolatile processor based on ferroelectric flip-flops can operate continuously even under power failures occurring at 20 KHz and will provide a new level of support to chip-level fine-grained power management and energy harvesting applications.
Abstract
Nonvolatile processors offer a number of desirable properties including instant on/off, zero standby power and resilience to power failures. This paper presents a fabricated nonvolatile processor based on ferroelectric flip-flops. These flipflops are used in a distributed fashion and are able to maintain system states without any power supply indefinitely. An efficient controller is employed to achieve parallel reads and writes to the flip-flops. A reconfigurable voltage detection system is designed for automatic system backup during power failures. Measurement results show that this nonvolatile processor can operate continuously even under power failures occurring at 20 KHz. It can backup system states within 7μs and restore them within 3 μs. Such capabilities will provide a new level of support to chip-level fine-grained power management and energy harvesting applications.

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Citations
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Proceedings ArticleDOI

Nonvolatile memory design based on ferroelectric FETs

TL;DR: This work proposes a 2-transistor (2T) FEFET-based nonvolatile memory with separate read and write paths that achieves non-destructive read and lower write power at iso-write speed compared to standard FE-RAM.
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Energy-efficient system design for IoT devices

TL;DR: An overview of the challenges involved in designing energy-efficient IoT edge devices is presented and recent research that has proposed promising solutions to address these challenges are described.
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Storage-Less and Converter-Less Photovoltaic Energy Harvesting With Maximum Power Point Tracking for Internet of Things

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An 8MHz 75µA/MHz zero-leakage non-volatile logic-based Cortex-M0 MCU SoC exhibiting 100% digital state retention at V DD =0V with <400ns wakeup and sleep transitions

TL;DR: A non-volatile logic (NVL)-based SoC is demonstrated that backs up its working state (all flip-flops) upon receiving a power interrupt, has zero leakage in sleep mode, and needs less than 400ns to restore the system state upon power-up.
Journal ArticleDOI

Microprocessor Optimizations for the Internet of Things: A Survey

TL;DR: This paper provides a foundation for the analysis and design of a diverse set of microprocessor architectures for next-generation IoT devices, and presents a broad IoT application classification methodology based on application functions to enable quicker workload characterizations for IoT microprocessors.
References
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Proceedings ArticleDOI

A compression-based area-efficient recovery architecture for nonvolatile processors

TL;DR: A compare and compress recovery architecture, consisting of a parallel run-length codec (PRLC) and a state table logic, to reduce the area of nonvolatile registers and a heuristic vector selecting algorithm, which can provide over 42% better register number reduction than other vector selecting approaches.
Proceedings ArticleDOI

A non-volatile microcontroller with integrated floating-gate transistors

TL;DR: Experiments indicate that the proposed architecture has minimal impact on normal operation while enabling all processor state to be preserved across an unexpected power interruption, and careful system-level optimizations to hide expensive non-volatile operations are evaluated.
Proceedings ArticleDOI

A compare-and-write ferroelectric nonvolatile flip-flop for energy-harvesting applications

TL;DR: A novel compare-and-write ferroelectric nonvolatile flip-flop is developed, which can be used in the checkpoint processor for energy-harvesting applications and can make the processornonvolatile, secure and instant recoverable from power failures.
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