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Proceedings ArticleDOI

A 3us wake-up time nonvolatile processor based on ferroelectric flip-flops

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TLDR
A fabricated nonvolatile processor based on ferroelectric flip-flops can operate continuously even under power failures occurring at 20 KHz and will provide a new level of support to chip-level fine-grained power management and energy harvesting applications.
Abstract
Nonvolatile processors offer a number of desirable properties including instant on/off, zero standby power and resilience to power failures. This paper presents a fabricated nonvolatile processor based on ferroelectric flip-flops. These flipflops are used in a distributed fashion and are able to maintain system states without any power supply indefinitely. An efficient controller is employed to achieve parallel reads and writes to the flip-flops. A reconfigurable voltage detection system is designed for automatic system backup during power failures. Measurement results show that this nonvolatile processor can operate continuously even under power failures occurring at 20 KHz. It can backup system states within 7μs and restore them within 3 μs. Such capabilities will provide a new level of support to chip-level fine-grained power management and energy harvesting applications.

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Citations
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Proceedings ArticleDOI

HW/SW co-design of nonvolatile IO system in energy harvesting sensor nodes for optimal data acquisition

TL;DR: A ferroelectric flip-flop based nonvolatile IO architecture is adopted and a risk-aware online scheduler is presented to solve the optimal data acquisition as an INLP problem and improve data acquisition by 2-5 times compared with conventional HW/SW architecture.
Proceedings ArticleDOI

NV-TCAM: Alternative interests and practices in NVM designs

TL;DR: This paper examined the applications of three promising eNVM technologies, i.e., magnetic tunneling junction, memristor, and ferroelectric memory field effect transistor (FeMFET), in the design of nonvolatile TCAM cells to achieve close-to-zero standby power.
Journal ArticleDOI

EMC: Energy-Aware Morphable Cache Design for Non-Volatile Processors

TL;DR: This work discusses the benefit of applying MLC NVM for cache backup and the architecture of morphable hybrid cache, and proposes a three-stage energy-aware cache management strategy to improve the system performance and energy utilization while guaranteeing successful backups.
Patent

Customizable Backup And Restore From Nonvolatile Logic Array

TL;DR: In this paper, a processing device is configurable to optimize wake-up time and peak power cost during restoration of a machine state from non-volatile storage using a plurality of nonvolatile logic element arrays.
Proceedings ArticleDOI

Non-volatile registers aware instruction selection for embedded systems

TL;DR: This paper investigates the usage of memory access instructions and proposes the NV Register Aware Instruction Selection (NAIS) algorithm to reduce the write operations on non-volatile registers and extends the lifetime of NV registers to 2 times as long as before on average.
References
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Proceedings ArticleDOI

A compression-based area-efficient recovery architecture for nonvolatile processors

TL;DR: A compare and compress recovery architecture, consisting of a parallel run-length codec (PRLC) and a state table logic, to reduce the area of nonvolatile registers and a heuristic vector selecting algorithm, which can provide over 42% better register number reduction than other vector selecting approaches.
Proceedings ArticleDOI

A non-volatile microcontroller with integrated floating-gate transistors

TL;DR: Experiments indicate that the proposed architecture has minimal impact on normal operation while enabling all processor state to be preserved across an unexpected power interruption, and careful system-level optimizations to hide expensive non-volatile operations are evaluated.
Proceedings ArticleDOI

A compare-and-write ferroelectric nonvolatile flip-flop for energy-harvesting applications

TL;DR: A novel compare-and-write ferroelectric nonvolatile flip-flop is developed, which can be used in the checkpoint processor for energy-harvesting applications and can make the processornonvolatile, secure and instant recoverable from power failures.
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