Proceedings ArticleDOI
Negative-Capacitance FinFETs: Numerical Simulation, Compact Modeling and Circuit Evaluation
Juan Pablo Duarte,Yen-Kai Lin,Yu-Hung Liao,Angada B. Sachid,Ming-Yen Kao,Harshit Agarwal,Pragya Kushwaha,Korok Chatterjee,Daewoong Kwon,Huan-Lin Chang,Sayeef Salahuddin,Chenming Hu +11 more
- pp 123-128
TLDR
In this article, a complete simulation framework for Negative Capacitance FinFETs including numerical simulation, compact model, and circuit evaluation is presented, where the influence of short-channel effects in Ferroelectric voltage amplification is incorporated.Abstract:
A complete simulation framework is presented for Negative Capacitance FinFETs including Numerical Simulation, Compact Modeling, and Circuit Evaluation. A 2D Numerical Simulation for FinFETs coupled with the Landau’s Ferroelectric Model captures device characteristics. A new version of the distributed Negative-Capacitance FinFET Compact Model is also presented in this work, where influence of short-channel effects in Ferroelectric voltage amplification are newly incorporated. Finally, a detailed analysis, from an energy perspective, is presented for the gate voltage amplification of Negative Capacitance FinFETs in ring-oscillator circuits.read more
Citations
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Journal ArticleDOI
Spacer Engineering in Negative Capacitance FinFETs
Yen-Kai Lin,Harshit Agarwal,Ming-Yen Kao,Jiuren Zhou,Yu-Hung Liao,Avirup Dasgupta,Pragya Kushwaha,Sayeef Salahuddin,Chenming Hu +8 more
TL;DR: In this article, the spacer design of the negative-capacitance FinFET (NC-FinFET) was investigated by using Sentaurus technology computer-aided design (TCAD).
Journal ArticleDOI
Analysis and Modeling of Inner Fringing Field Effect on Negative Capacitance FinFETs
Yen-Kai Lin,Harshit Agarwal,Pragya Kushwaha,Ming-Yen Kao,Yu-Hung Liao,Korok Chatterjee,Sayeef Salahuddin,Chenming Hu +7 more
TL;DR: In this paper, the impact of inner fringing fields on the negative capacitance FinFET (NC-FinFET) and how this scales with the technology node was investigated.
Journal ArticleDOI
Recent Advances in Negative Capacitance FinFETs for Low-Power Applications: A Review
TL;DR: In this article, the negative capacitance fin field effect transistors (NC-FinFETs) came up as the next-generation platform to withstand the aggressive scaling of transistors.
Journal ArticleDOI
Anomalously Beneficial Gate-Length Scaling Trend of Negative Capacitance Transistors
TL;DR: The negative capacitance field effect transistors exhibit excellent SS and DIBL improvements from the control MOSFET devices at very short gate lengths, a phenomenon which cannot be explained using conventional MOS FET theory.
Journal ArticleDOI
Sustained Benefits of NCFETs Under Extreme Scaling to the End of the IRDS
Thomas Cam,Ji Kai Wang,Michael Wong,Kyle Holland,Prasad S. Gudem,Diego Kienle,Mani Vaidyanathan +6 more
TL;DR: In this article, the authors use full quantum-transport simulations by coupling the Landau-Khalatnikov (LK) and Poisson equations self-consistently with the nonequilibrium Green's function (NEGF) formalism, and calibrated to experimental results, to investigate extremely scaled negative-capacitance, field effect transistors (NCFETs) having dimensions toward the end of the international roadmap for devices and systems (IRDS), that is, to sub-10-nm gate lengths, where channel transport can be expected to be governed by
References
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Journal ArticleDOI
Use of Negative Capacitance to Provide Voltage Amplification for Low Power Nanoscale Devices
Sayeef Salahuddin,Supriyo Datta +1 more
TL;DR: By replacing the standard insulator with a ferroelectric insulator of the right thickness it should be possible to implement a step-up voltage transformer that will amplify the gate voltage thus leading to values of S lower than 60 mV/decade and enabling low voltage/low power operation.
Journal ArticleDOI
Ferroelectricity in Simple Binary ZrO2 and HfO2
Johannes Müller,T. S. Böscke,Uwe Schröder,Stefan Mueller,D. Bräuhaus,Ulrich Böttger,Lothar Frey,Thomas Mikolajick +7 more
TL;DR: A structural investigation revealed the orthorhombic phase to be of space group Pbc2(1), whose noncentrosymmetric nature is deemed responsible for the spontaneous polarization in this novel, nanoscale ferroelectrics.
Proceedings ArticleDOI
14nm Ferroelectric FinFET technology with steep subthreshold slope for ultra low power applications
Zoran Krivokapic,Uzma Rana,Rohit Galatage,Ali Razavieh,Ahmedullah Aziz,Jinping Liu,Jiajun Shi,H. J. Kim,Ryan Sporer,Claudy Serrao,A. Busquet,P. Polakowski,Johannes Müller,Walter Kleemeier,Jacob Ajey Poovannummoottil,D. Brown,Andreas Knorr,Rick Carter,Srinivasa Banna +18 more
TL;DR: In this paper, Doped hafnia ferroelectric layers with thicknesses from 3 to 8nm are integrated into state-of-the-art 14nm FinFET technology without any further process modification.
Proceedings ArticleDOI
Compact models of negative-capacitance FinFETs: Lumped and distributed charge models
Juan P. Duarte,Sourabh Khandelwal,Asif Islam Khan,Angada B. Sachid,Yen-Kai Lin,Huan-Lin Chang,Sayeef Salahuddin,Chenming Hu +7 more
TL;DR: In this article, the authors propose a lumped and distributed charge model for negative capacitance FinFETs, where the ferroelectric layer will impact the local channel charge and this distributed effect has important implications on device characteristics.
Proceedings ArticleDOI
A 14 nm SoC platform technology featuring 2 nd generation Tri-Gate transistors, 70 nm gate pitch, 52 nm metal pitch, and 0.0499 um 2 SRAM cells, optimized for low power, high performance and high density SoC products
C.-H. Jan,F. Al-Amoody,Chang Hsu-Yu,Tsung-Yuan Chang,Y.-W. Chen,N. L. Dias,Hafez Walid M,D. Ingerly,M. Jang,Eric Karl,S. K.-Y. Shi,K. Komeyli,H. Kilambi,A. Kumar,K. Byon,Chen-Guan Lee,J. Lee,T. Leo,Pei-Chi Liu,Nidhi Nidhi,Olac-Vaw Roman W,C. Petersburg,K. Phoa,Chetan Prasad,C. Quincy,Ramaswamy Rahul,T. Rana,L. Rockford,Anand Subramaniam,Curtis Tsai,P. Vandervoorn,L. Yang,A. Zainuddin,P. Bai +33 more
TL;DR: A leading edge 14 nm SoC platform technology based upon the 2nd generation Tri-Gate transistor technology has been optimized for density, low power and wide dynamic range and a full suite of analog, mixed-signal and RF features are supported.
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